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/*
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include "imx27-phytec-phycore-som.dtsi"

/ {
	model = "Phytec pcm970";
	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";

	chosen {
		stdout-path = &uart1;
	};

	display0: LQ035Q7 {
		model = "Sharp-LQ035Q7";
		native-mode = <&timing0>;
		bits-per-pixel = <16>;
		fsl,pcr = <0xf00080c0>;

		display-timings {
			timing0: 240x320 {
				clock-frequency = <5500000>;
				hactive = <240>;
				vactive = <320>;
				hback-porch = <5>;
				hsync-len = <7>;
				hfront-porch = <16>;
				vback-porch = <7>;
				vsync-len = <1>;
				vfront-porch = <9>;
				pixelclk-active = <1>;
				hsync-active = <1>;
				vsync-active = <1>;
				de-active = <0>;
			};
		};
	};

	regulators {
		regulator@2 {
			compatible = "regulator-fixed";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_csien>;
			reg = <2>;
			regulator-name = "CSI_EN";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
			regulator-always-on;
		};
	};

	usbphy {
		usbphy2: usbphy@2 {
			compatible = "usb-nop-xceiv";
			reg = <2>;
			vcc-supply = <&reg_5v0>;
			clocks = <&clks IMX27_CLK_DUMMY>;
			clock-names = "main_clk";
		};
	};
};

&cspi1 {
	pinctrl-0 = <&pinctrl_cspi1>, <&pinctrl_cspi1cs1>;
	cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>,
		   <&gpio4 27 GPIO_ACTIVE_LOW>;
};

&fb {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_imxfb1>;
	display = <&display0>;
	lcd-supply = <&reg_5v0>;
	fsl,dmacr = <0x00020010>;
	fsl,lscr1 = <0x00120300>;
	fsl,lpccr = <0x00a903ff>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	camgpio: pca9536@41 {
		compatible = "nxp,pca9536";
		reg = <0x41>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&iomuxc {
	imx27_phycore_rdk {
		pinctrl_csien: csiengrp {
			fsl,pins = <
				MX27_PAD_USB_OC_B__GPIO2_24 0x0
			>;
		};

		pinctrl_cspi1cs1: cspi1cs1grp {
			fsl,pins = <
				MX27_PAD_CSPI1_SS1__GPIO4_27 0x0
			>;
		};

		pinctrl_imxfb1: imxfbgrp {
			fsl,pins = <
				MX27_PAD_LD0__LD0 0x0
				MX27_PAD_LD1__LD1 0x0
				MX27_PAD_LD2__LD2 0x0
				MX27_PAD_LD3__LD3 0x0
				MX27_PAD_LD4__LD4 0x0
				MX27_PAD_LD5__LD5 0x0
				MX27_PAD_LD6__LD6 0x0
				MX27_PAD_LD7__LD7 0x0
				MX27_PAD_LD8__LD8 0x0
				MX27_PAD_LD9__LD9 0x0
				MX27_PAD_LD10__LD10 0x0
				MX27_PAD_LD11__LD11 0x0
				MX27_PAD_LD12__LD12 0x0
				MX27_PAD_LD13__LD13 0x0
				MX27_PAD_LD14__LD14 0x0
				MX27_PAD_LD15__LD15 0x0
				MX27_PAD_LD16__LD16 0x0
				MX27_PAD_LD17__LD17 0x0
				MX27_PAD_CLS__CLS 0x0
				MX27_PAD_CONTRAST__CONTRAST 0x0
				MX27_PAD_LSCLK__LSCLK 0x0
				MX27_PAD_OE_ACD__OE_ACD 0x0
				MX27_PAD_PS__PS 0x0
				MX27_PAD_REV__REV 0x0
				MX27_PAD_SPL_SPR__SPL_SPR 0x0
				MX27_PAD_HSYNC__HSYNC 0x0
				MX27_PAD_VSYNC__VSYNC 0x0
			>;
		};

		pinctrl_i2c1: i2c1grp {
			/* Add pullup to DATA line */
			fsl,pins = <
				MX27_PAD_I2C_DATA__I2C_DATA	0x1
				MX27_PAD_I2C_CLK__I2C_CLK	0x0
			>;
		};

		pinctrl_owire1: owire1grp {
			fsl,pins = <
				MX27_PAD_RTCK__OWIRE 0x0
			>;
		};

		pinctrl_sdhc2: sdhc2grp {
			fsl,pins = <
				MX27_PAD_SD2_CLK__SD2_CLK 0x0
				MX27_PAD_SD2_CMD__SD2_CMD 0x0
				MX27_PAD_SD2_D0__SD2_D0 0x0
				MX27_PAD_SD2_D1__SD2_D1 0x0
				MX27_PAD_SD2_D2__SD2_D2 0x0
				MX27_PAD_SD2_D3__SD2_D3 0x0
				MX27_PAD_SSI3_FS__GPIO3_28	0x0 /* WP */
				MX27_PAD_SSI3_RXDAT__GPIO3_29	0x0 /* CD */
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX27_PAD_UART1_TXD__UART1_TXD 0x0
				MX27_PAD_UART1_RXD__UART1_RXD 0x0
				MX27_PAD_UART1_CTS__UART1_CTS 0x0
				MX27_PAD_UART1_RTS__UART1_RTS 0x0
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX27_PAD_UART2_TXD__UART2_TXD 0x0
				MX27_PAD_UART2_RXD__UART2_RXD 0x0
				MX27_PAD_UART2_CTS__UART2_CTS 0x0
				MX27_PAD_UART2_RTS__UART2_RTS 0x0
			>;
		};

		pinctrl_usbh2: usbh2grp {
			fsl,pins = <
				MX27_PAD_USBH2_CLK__USBH2_CLK 0x0
				MX27_PAD_USBH2_DIR__USBH2_DIR 0x0
				MX27_PAD_USBH2_NXT__USBH2_NXT 0x0
				MX27_PAD_USBH2_STP__USBH2_STP 0x0
				MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0x0
				MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0x0
				MX27_PAD_CSPI2_MISO__USBH2_DATA2 0x0
				MX27_PAD_CSPI2_SS1__USBH2_DATA3 0x0
				MX27_PAD_CSPI2_SS2__USBH2_DATA4 0x0
				MX27_PAD_CSPI1_SS2__USBH2_DATA5 0x0
				MX27_PAD_CSPI2_SS0__USBH2_DATA6 0x0
				MX27_PAD_USBH2_DATA7__USBH2_DATA7 0x0
			>;
		};

		pinctrl_weim: weimgrp {
			fsl,pins = <
				MX27_PAD_CS4_B__CS4_B		0x0 /* CS4 */
				MX27_PAD_SD1_D1__GPIO5_19	0x0 /* CAN IRQ */
			>;
		};
	};
};

&owire {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_owire1>;
	status = "okay";
};

&pmicleds {
	ledr1: led@3 {
		reg = <3>;
		label = "system:red1:user";
	};

	ledg1: led@4 {
		reg = <4>;
		label = "system:green1:user";
	};

	ledb1: led@5 {
		reg = <5>;
		label = "system:blue1:user";
	};

	ledr2: led@6 {
		reg = <6>;
		label = "system:red2:user";
	};

	ledg2: led@7 {
		reg = <7>;
		label = "system:green2:user";
	};

	ledb2: led@8 {
		reg = <8>;
		label = "system:blue2:user";
	};

	ledr3: led@9 {
		reg = <9>;
		label = "system:red3:nand";
		linux,default-trigger = "nand-disk";
	};

	ledg3: led@10 {
		reg = <10>;
		label = "system:green3:live";
		linux,default-trigger = "heartbeat";
	};

	ledb3: led@11 {
		reg = <11>;
		label = "system:blue3:cpu";
		linux,default-trigger = "cpu0";
	};
};

&sdhci2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sdhc2>;
	bus-width = <4>;
	cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
	wp-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
	vmmc-supply = <&vmmc1_reg>;
	status = "okay";
};

&uart1 {
	uart-has-rtscts;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	uart-has-rtscts;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&usbh2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbh2>;
	dr_mode = "host";
	phy_type = "ulpi";
	vbus-supply = <&reg_5v0>;
	fsl,usbphy = <&usbphy2>;
	disable-over-current;
	status = "okay";
};

&weim {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_weim>;

	can@4,0 {
		compatible = "nxp,sja1000";
		reg = <4 0x00000000 0x00000100>;
		interrupt-parent = <&gpio5>;
		interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
		nxp,external-clock-frequency = <16000000>;
		nxp,tx-output-config = <0x16>;
		nxp,no-comparator-bypass;
		fsl,weim-cs-timing = <0x0000dcf6 0x444a0301 0x44443302>;
	};
};
sg'> If the underlying master ever changes its L2 (e.g. bonding device), then make sure that the IPvlan slaves always emit packets with the current L2 of the master instead of the stale mac addr which was copied during the device creation. The problem can be seen with following script - #!/bin/bash # Create a vEth pair ip link add dev veth0 type veth peer name veth1 ip link set veth0 up ip link set veth1 up ip link show veth0 ip link show veth1 # Create an IPvlan device on one end of this vEth pair. ip link add link veth0 dev ipvl0 type ipvlan mode l2 ip link show ipvl0 # Change the mac-address of the vEth master. ip link set veth0 address 02:11:22:33:44:55 Fixes: 2ad7bf363841 ("ipvlan: Initial check-in of the IPVLAN driver.") Signed-off-by: Mahesh Bandewar <maheshb@google.com> Signed-off-by: David S. Miller <davem@davemloft.net> * vxge: Clean up unused variables in vxge-trafficChristos Gkekas2017-10-121-19/+0Star | | | | | | | Delete unused channel variables in vxge-traffic. Signed-off-by: Christos Gkekas <chris.gekas@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net> * net: systemport: Turn on ACB at the SYSTEMPORT levelFlorian Fainelli2017-10-121-1/+5 | | | | | | | | | | | | Now that we have established the queue mapping between the switch port egress queues and the SYSTEMPORT egress queues, we can turn on Advanced Congestion Buffering (ACB) at the SYSTEMPORT level. This enables the Ethernet MAC controller to get out of band flow control information directly from the switch port and queue that it monitors such that its internal TDMA can be appropriately backpressured. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net> * net: dsa: bcm_sf2: Turn on ACB at the switch levelFlorian Fainelli2017-10-122-0/+53 | | | | | | | | | | | | | | | Turn on the out of band Advanced Congestion Buffering (ACB) mechanism at the switch level now that we have properly established the queue mapping between the switch egress queues and the SYSTEMPORT egress queues. This allows the switch to correctly backpressure the host system when one of its queue drops below the configured thresholds. This is also helping achieve so called "lossless" behavior by adapting the TX interrupt pacing to the actual speed and capacity of the switch port. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net> * net: systemport: Establish lower/upper queue mappingFlorian Fainelli2017-10-122-5/+121 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Establish a queue mapping between the DSA slave network device queues created that correspond to switch port queues, and the transmit queue that SYSTEMPORT manages. We need to configure the SYSTEMPORT transmit queue with the switch port number and switch port queue number in order for the switch and SYSTEMPORT hardware to utilize the out of band congestion notification. This hardware mechanism works by looking at the switch port egress queue and determines whether there is enough buffers for this queue, with that class of service for a successful transmission and if not, backpressures the SYSTEMPORT queue that is being used. For this to work, we implement a notifier which looks at the DSA_PORT_REGISTER event. When DSA network devices are registered, the framework calls the DSA notifiers when that happens, extracts the number of queues for these devices and their associated port number, remembers that in the driver private structure and linearly maps those queues to TX rings/queues that we manage. This scheme works because DSA slave network deviecs always transmit through SYSTEMPORT so when DSA slave network devices are destroyed/brought down, the corresponding SYSTEMPORT queues are no longer used. Also, by design of the DSA framework, the master network device (SYSTEMPORT) is registered first. For faster lookups we use an array of up to DSA_MAX_PORTS * number of queues per port, and then map pointers to bcm_sysport_tx_ring such that our ndo_select_queue() implementation can just index into that array to locate the corresponding ring index. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net> * Revert "net: qcom/emac: enforce DMA address restrictions"Timur Tabi2017-10-121-24/+15Star | | | | | | | | | | | This reverts commit df1ec1b9d0df57e96011f175418dc95b1af46821. It turns out that memory allocated via dma_alloc_coherent is always aligned to the size of the buffer, so there's no way the RRD and RFD can ever be in separate 32-bit regions. Signed-off-by: Timur Tabi <timur@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net> * net/mlx4_en: XDP_TX, assign constant values of TX descs on ring creaionTariq Toukan2017-10-123-14/+27 | | | | | | | | | | | | | | | | | | | | In XDP_TX, some fields in tx_info and tx_desc are constants across all entries of the different XDP_TX rings. Assign values to these fields on ring creation time, rather than in data-path. Patchset performance tests: Tested on ConnectX3Pro, Intel(R) Xeon(R) CPU E5-2680 v3 @ 2.50GHz Single queue no-RSS optimization ON. XDP_TX packet rate: ------------------------------ Before | After | Gain | 13.7 Mpps | 14.0 Mpps | %2.2 | ------------------------------ Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net> * net/mlx4_en: Obsolete call to generic write_desc in XDP xmit flowTariq Toukan2017-10-121-5/+12 | | | | | | | | Function mlx4_en_tx_write_desc() is not optimized to use of XDP xmit. Use the relevant parts inline instead. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net> * net/mlx4_en: Replace netdev parameter with priv in XDP xmit functionTariq Toukan2017-10-123-4/+3Star | | | | | | | | | The struct net_device parameter was passed only to extract struct mlx4_en_priv out of it. Here we pass the priv parameter directly. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net> * net: sched: convert cls_flower->egress_dev users to tc_setup_cb_egdev infraJiri Pirko2017-10-123-12/+26 | | | | | | | | | | The only user of cls_flower->egress_dev is mlx5. So do the conversion there alongside with the code originating the call in cls_flower function fl_hw_replace_filter to the newly introduced egress device callback infrastucture. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net> * net: qualcomm: rmnet: Implement bridge modeSubash Abhinov Kasiviswanathan2017-10-124-6/+122 | | | | | | | | | | Add support to bridge two devices which can send multiplexing and aggregation (MAP) data. This is done only when the data itself is not going to be consumed in the stack but is being passed on to a different endpoint. This is mainly used for testing. Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net> * net: qualcomm: rmnet: Convert the muxed endpoint to hlistSubash Abhinov Kasiviswanathan2017-10-126-53/+68 | | | | | | | | | | Rather than using a static array, use a hlist to store the muxed endpoints and use the mux id to query the rmnet_device. This is useful as usually very few mux ids are used. Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org> Cc: Dan Williams <dcbw@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net> * net: qualcomm: rmnet: Remove duplicate setting of rmnet_devicesSubash Abhinov Kasiviswanathan2017-10-122-5/+4Star | | | | | | | | The rmnet_devices information is already stored in muxed_ep, so storing this in rmnet_devices[] again is redundant. Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net> * net: qualcomm: rmnet: Remove duplicate setting of rmnet private infoSubash Abhinov Kasiviswanathan2017-10-126-40/+15Star | | | | | | | | | | The end point is set twice in the local_ep as well as the mux_id and the real_dev in the rmnet private structure. Remove the local_ep. While these elements are equivalent, rmnet_endpoint will be used only as part of the rmnet_port for muxed scenarios in VND mode. Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net> * net: qualcomm: rmnet: Move rmnet_mode to rmnet_portSubash Abhinov Kasiviswanathan2017-10-123-10/+7Star | | | | | | | | Mode information on the real device makes it easier to route packets to rmnet device or bridged device based on the configuration. Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net> * net: qualcomm: rmnet: Remove some unused definesSubash Abhinov Kasiviswanathan2017-10-121-8/+0Star | | | | | | | | Most of these constants were used in the initial patchset where custom netlink configuration was used and hence are no longer relevant. Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net> * net: qualcomm: rmnet: Remove existing logic for bridge modeSubash Abhinov Kasiviswanathan2017-10-122-69/+9Star | | | | | | | This will be rewritten in the following patches. Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net> * net: qcom/emac: clean up some TX/RX error messagesTimur Tabi2017-10-122-13/+10Star | | | | | | | | | | | | Some of the error messages that are printed by the interrupt handlers are poorly written. For example, many don't include a device prefix, so there's no indication that they are EMAC errors. Also use rate limiting for all messages that could be printed from interrupt context. Signed-off-by: Timur Tabi <timur@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net> * net: qcom/emac: enforce DMA address restrictionsTimur Tabi2017-10-121-15/+24 | | | | | | | | | | | | | The EMAC has a restriction that the upper 32 bits of the base addresses for the RFD and RRD rings must be the same. The ensure that restriction, we allocate twice the space for the RRD and locate it at an appropriate address. We also re-arrange the allocations so that invalid addresses are even less likely. Signed-off-by: Timur Tabi <timur@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net> * net: qcom/emac: remove unused address arraysTimur Tabi2017-10-121-13/+3Star | | | | | | | | | | The EMAC is capable of multiple TX and RX rings, but the driver only supports one ring for each. One function had some left-over unused code that supports multiple rings, but all it did was make the code harder to read. Signed-off-by: Timur Tabi <timur@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net> * net: qcom/emac: specify the correct DMA maskTimur Tabi2017-10-121-13/+4Star | | | | | | | | | | | | The 64/32-bit DMA mask hackery in the EMAC driver is not actually necessary, and is technically not accurate. The EMAC hardware is limted to a 45-bit DMA address. Although no EMAC-enabled system can have that much DDR, an IOMMU could possible provide a larger address. Rather than play games with the DMA mappings, the driver should provide a correct value and trust the DMA/IOMMU layers to do the right thing. Signed-off-by: Timur Tabi <timur@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net> * net: hns3: make local functions staticWei Yongjun