blob: c5151f84659189c3703814f6035b70dfd2a2e4e0 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
|
/*
* intc2.c -- support for the 2nd INTC controller of the 5249
*
* (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
static void intc2_irq_gpio_mask(unsigned int irq)
{
u32 imr;
imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
imr &= ~(0x1 << (irq - MCFINTC2_GPIOIRQ0));
writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
}
static void intc2_irq_gpio_unmask(unsigned int irq)
{
u32 imr;
imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
imr |= (0x1 << (irq - MCFINTC2_GPIOIRQ0));
writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
}
static void intc2_irq_gpio_ack(unsigned int irq)
{
writel(0x1 << (irq - MCFINTC2_GPIOIRQ0), MCF_MBAR2 + MCFSIM2_GPIOINTCLEAR);
}
static struct irq_chip intc2_irq_gpio_chip = {
.name = "CF-INTC2",
.mask = intc2_irq_gpio_mask,
.unmask = intc2_irq_gpio_unmask,
.ack = intc2_irq_gpio_ack,
};
static int __init mcf_intc2_init(void)
{
int irq;
/* GPIO interrupt sources */
for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) {
irq_desc[irq].chip = &intc2_irq_gpio_chip;
set_irq_handler(irq, handle_edge_irq);
}
return 0;
}
arch_initcall(mcf_intc2_init);
|