1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 /* * Atomic operations on 64-bit quantities. * * Copyright (C) 2017 Red Hat, Inc. * * Author: Paolo Bonzini <pbonzini@redhat.com> * * This work is licensed under the terms of the GNU GPL, version 2 or later. * See the COPYING file in the top-level directory. */ #include "qemu/osdep.h" #include "qemu/atomic.h" #include "qemu/stats64.h" #include "qemu/processor.h" #ifndef CONFIG_ATOMIC64 static inline void stat64_rdlock(Stat64 *s) { /* Keep out incoming writers to avoid them starving us. */ atomic_add(&s->lock, 2); /* If there is a concurrent writer, wait for it. */ while (atomic_read(&s->lock) & 1) { cpu_relax(); } } static inline void stat64_rdunlock(Stat64 *s) { atomic_sub(&s->lock, 2); } static inline bool stat64_wrtrylock(Stat64 *s) { return atomic_cmpxchg(&s->lock, 0, 1) == 0; } static inline void stat64_wrunlock(Stat64 *s) { atomic_dec(&s->lock); } uint64_t stat64_get(const Stat64 *s) { uint32_t high, low; stat64_rdlock((Stat64 *)s); /* 64-bit writes always take the lock, so we can read in * any order. */ high = atomic_read(&s->high); low = atomic_read(&s->low); stat64_rdunlock((Stat64 *)s); return ((uint64_t)high << 32) | low; } bool stat64_add32_carry(Stat64 *s, uint32_t low, uint32_t high) { uint32_t old; if (!stat64_wrtrylock(s)) { cpu_relax(); return false; } default y #### RTE-CB platform-specific config # Boards in the RTE-x-CB series config RTE_CB bool depends RTE_CB_MA1 || RTE_CB_NB85E || RTE_CB_ME2 default y config RTE_CB_MULTI bool # RTE_CB_NB85E can either have multi ROM support or not, but # other platforms (currently only RTE_CB_MA1) require it. prompt "Multi monitor ROM support" if RTE_CB_NB85E depends RTE_CB_MA1 || RTE_CB_NB85E default y config RTE_CB_MULTI_DBTRAP bool "Pass illegal insn trap / dbtrap to kernel" depends RTE_CB_MULTI default n config RTE_CB_MA1_KSRAM bool "Kernel in SRAM (limits size of kernel)" depends RTE_CB_MA1 && RTE_CB_MULTI default n config RTE_MB_A_PCI bool "Mother-A PCI support" depends RTE_CB default y # The GBUS is used to talk to the RTE-MOTHER-A board config RTE_GBUS_INT bool depends RTE_MB_A_PCI default y # The only PCI bus we support is on the RTE-MOTHER-A board config PCI bool default RTE_MB_A_PCI #### Some feature-specific configs # Everything except for the GDB simulator uses the same interrupt controller config V850E_INTC bool default !V850E_SIM # Everything except for the various simulators uses the "Timer D" unit config V850E_TIMER_D bool default !V850E_SIM && !V850E2_SIM85E2 # Cache control used on some v850e1 processors config V850E_CACHE bool default V850E_TEG || V850E_ME2 # Cache control used on v850e2 processors; I think this should # actually apply to more, but currently only the SIM85E2S uses it config V850E2_CACHE bool default V850E2_SIM85E2S config NO_CACHE bool default !V850E_CACHE && !V850E2_CACHE #### Misc config config ROM_KERNEL bool "Kernel in ROM" depends V850E2_ANNA || V850E_AS85EP1 || RTE_CB_ME2 # Some platforms pre-zero memory, in which case the kernel doesn't need to config ZERO_BSS bool depends !V850E2_SIM85E2C default y # The crappy-ass zone allocator requires that the start of allocatable # memory be aligned to the largest possible allocation. config FORCE_MAX_ZONEORDER int default 8 if V850E2_SIM85E2C || V850E2_FPGA85E2C config V850E_HIGHRES_TIMER bool "High resolution timer support" depends V850E_TIMER_D config TIME_BOOTUP bool "Time bootup" depends V850E_HIGHRES_TIMER config RESET_GUARD bool "Reset Guard" config LARGE_ALLOCS bool "Allow allocating large blocks (> 1MB) of memory" help Allow the slab memory allocator to keep chains for very large memory sizes - upto 32MB. You may need this if your system has a lot of RAM, and you need to able to allocate very large contiguous chunks. If unsure, say N. endmenu ############################################################################# source init/Kconfig ############################################################################# menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)" # config PCI # bool "PCI support" # help # Support for PCI bus. source "drivers/pci/Kconfig" source "drivers/pcmcia/Kconfig" source "drivers/pci/hotplug/Kconfig" endmenu menu "Executable file formats" source "fs/Kconfig.binfmt" endmenu ############################################################################# source "drivers/base/Kconfig" source drivers/mtd/Kconfig source drivers/parport/Kconfig #source drivers/pnp/Kconfig source drivers/block/Kconfig ############################################################################# menu "Disk device support" source "drivers/ide/Kconfig" source "drivers/scsi/Kconfig" endmenu ############################################################################# source "drivers/md/Kconfig" source "drivers/message/fusion/Kconfig" source "drivers/ieee1394/Kconfig" source "drivers/message/i2o/Kconfig" source "net/Kconfig" source "drivers/isdn/Kconfig" #source "drivers/telephony/Kconfig" # # input before char - char/joystick depends on it. As does USB. # source "drivers/input/Kconfig" source "drivers/char/Kconfig" #source drivers/misc/Config.in source "drivers/media/Kconfig" source "fs/Kconfig" source "drivers/video/Kconfig" source "sound/Kconfig" source "drivers/usb/Kconfig" source "arch/v850/Kconfig.debug" source "security/Kconfig" source "crypto/Kconfig" source "lib/Kconfig" ############################################################################# |