blob: 8cecbee7a270c1a8caea414eda9901bbe47a02a8 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
|
/*
* Tegra host1x Register Offsets for Tegra20 and Tegra30
*
* Copyright (c) 2010-2013 NVIDIA Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __HOST1X_HOST1X01_HARDWARE_H
#define __HOST1X_HOST1X01_HARDWARE_H
#include <linux/types.h>
#include <linux/bitops.h>
#include "hw_host1x01_sync.h"
#endif
|
