diff options
| author | Richard Henderson | 2021-02-13 14:03:14 +0100 |
|---|---|---|
| committer | Alex Bennée | 2021-02-18 09:19:15 +0100 |
| commit | 95ab7c22914af17023421caf157360a9a3419007 (patch) | |
| tree | 5f660d74cb96d16a5cc2785b54e60045efc8e14c /accel/tcg | |
| parent | accel/tcg: Create io_recompile_replay_branch hook (diff) | |
| download | qemu-95ab7c22914af17023421caf157360a9a3419007.tar.gz qemu-95ab7c22914af17023421caf157360a9a3419007.tar.xz qemu-95ab7c22914af17023421caf157360a9a3419007.zip | |
target/mips: Create mips_io_recompile_replay_branch
Move the code from accel/tcg/translate-all.c to target/mips/cpu.c.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210208233906.479571-4-richard.henderson@linaro.org>
Message-Id: <20210213130325.14781-13-alex.bennee@linaro.org>
Diffstat (limited to 'accel/tcg')
| -rw-r--r-- | accel/tcg/translate-all.c | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 99ca6f36b9..9fea5c0e59 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -2418,7 +2418,7 @@ void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr) */ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr) { -#if defined(TARGET_MIPS) || defined(TARGET_SH4) +#if defined(TARGET_SH4) CPUArchState *env = cpu->env_ptr; #endif TranslationBlock *tb; @@ -2444,15 +2444,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr) cpu_neg(cpu)->icount_decr.u16.low++; n = 2; } -#if defined(TARGET_MIPS) - if ((env->hflags & MIPS_HFLAG_BMASK) != 0 - && env->active_tc.PC != tb->pc) { - env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4); - cpu_neg(cpu)->icount_decr.u16.low++; - env->hflags &= ~MIPS_HFLAG_BMASK; - n = 2; - } -#elif defined(TARGET_SH4) +#if defined(TARGET_SH4) if ((env->flags & ((DELAY_SLOT | DELAY_SLOT_CONDITIONAL))) != 0 && env->pc != tb->pc) { env->pc -= 2; |