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| author | Richard Henderson | 2022-03-01 22:59:49 +0100 |
|---|---|---|
| committer | Peter Maydell | 2022-03-02 20:27:37 +0100 |
| commit | 0af312b6edd231e1c8d0dec12494a80bc39ac761 (patch) | |
| tree | e366c8e539644e62aedcaffab82a5da6d22e8c43 /docs/system | |
| parent | target/arm: Prepare DBGBVR and DBGWVR for FEAT_LVA (diff) | |
| download | qemu-0af312b6edd231e1c8d0dec12494a80bc39ac761.tar.gz qemu-0af312b6edd231e1c8d0dec12494a80bc39ac761.tar.xz qemu-0af312b6edd231e1c8d0dec12494a80bc39ac761.zip | |
target/arm: Implement FEAT_LVA
This feature is relatively small, as it applies only to
64k pages and thus requires no additional changes to the
table descriptor walking algorithm, only a change to the
minimum TSZ (which is the inverse of the maximum virtual
address space size).
Note that this feature widens VBAR_ELx, but we already
treat the register as being 64 bits wide.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220301215958.157011-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs/system')
| -rw-r--r-- | docs/system/arm/emulation.rst | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 144dc491d9..f3eabddfb5 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -27,6 +27,7 @@ the following architecture extensions: - FEAT_LRCPC (Load-acquire RCpc instructions) - FEAT_LRCPC2 (Load-acquire RCpc instructions v2) - FEAT_LSE (Large System Extensions) +- FEAT_LVA (Large Virtual Address space) - FEAT_MTE (Memory Tagging Extension) - FEAT_MTE2 (Memory Tagging Extension) - FEAT_MTE3 (MTE Asymmetric Fault Handling) |