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| author | Richard Henderson | 2018-08-16 15:05:29 +0200 |
|---|---|---|
| committer | Peter Maydell | 2018-08-16 15:29:58 +0200 |
| commit | 64d450a0eaad5f02f9d6bba1dd451446297bb4dc (patch) | |
| tree | 5cf0dca5f3ce13e2fd301e4b9d20f0c68200a12d /fpu | |
| parent | target/arm: Fix aa64 FCADD and FCMLA decode (diff) | |
| download | qemu-64d450a0eaad5f02f9d6bba1dd451446297bb4dc.tar.gz qemu-64d450a0eaad5f02f9d6bba1dd451446297bb4dc.tar.xz qemu-64d450a0eaad5f02f9d6bba1dd451446297bb4dc.zip | |
softfloat: Fix missing inexact for floating-point add
For 0x1.0000000000003p+0 + 0x1.ffffffep+14 = 0x1.0001fffp+15
we dropped the sticky bit and so failed to raise inexact.
Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Message-id: 20180810193129.1556-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'fpu')
| -rw-r--r-- | fpu/softfloat.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 8cd2400081..7d63cffdeb 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -701,7 +701,7 @@ static FloatParts addsub_floats(FloatParts a, FloatParts b, bool subtract, } a.frac += b.frac; if (a.frac & DECOMPOSED_OVERFLOW_BIT) { - a.frac >>= 1; + shift64RightJamming(a.frac, 1, &a.frac); a.exp += 1; } return a; |