diff options
| author | Konrad Rzeszutek Wilk | 2018-05-21 23:54:23 +0200 |
|---|---|---|
| committer | Eduardo Habkost | 2018-05-21 23:59:08 +0200 |
| commit | 403503b162ffc33fb64cfefdf7b880acf41772cd (patch) | |
| tree | fe9b1ed0a578fa013bbe1aa3efb02ac7c7fe87af /hw/display | |
| parent | i386: Define the Virt SSBD MSR and handling of it (CVE-2018-3639) (diff) | |
| download | qemu-403503b162ffc33fb64cfefdf7b880acf41772cd.tar.gz qemu-403503b162ffc33fb64cfefdf7b880acf41772cd.tar.xz qemu-403503b162ffc33fb64cfefdf7b880acf41772cd.zip | |
i386: define the AMD 'virt-ssbd' CPUID feature bit (CVE-2018-3639)
AMD Zen expose the Intel equivalant to Speculative Store Bypass Disable
via the 0x80000008_EBX[25] CPUID feature bit.
This needs to be exposed to guest OS to allow them to protect
against CVE-2018-3639.
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20180521215424.13520-3-berrange@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'hw/display')
0 files changed, 0 insertions, 0 deletions