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author | Bin Meng | 2020-09-03 12:40:16 +0200 |
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committer | Alistair Francis | 2020-09-10 00:54:19 +0200 |
commit | 406fafd5d0f9a1c6a365ff1733c26a043b1c4877 (patch) | |
tree | ee4ed77217e62a3d3a8c185e8eda59ff2a138c35 /hw/intc/Kconfig | |
parent | hw/riscv: Move sifive_gpio model to hw/gpio (diff) | |
download | qemu-406fafd5d0f9a1c6a365ff1733c26a043b1c4877.tar.gz qemu-406fafd5d0f9a1c6a365ff1733c26a043b1c4877.tar.xz qemu-406fafd5d0f9a1c6a365ff1733c26a043b1c4877.zip |
hw/riscv: Move sifive_clint model to hw/intc
This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move sifive_clint model to hw/intc directory.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1599129623-68957-6-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/intc/Kconfig')
-rw-r--r-- | hw/intc/Kconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig index 2ae1e89497..f499d0f8df 100644 --- a/hw/intc/Kconfig +++ b/hw/intc/Kconfig @@ -67,3 +67,6 @@ config RX_ICU config LOONGSON_LIOINTC bool + +config SIFIVE_CLINT + bool |