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| author | Richard Henderson | 2016-12-27 15:59:24 +0100 |
|---|---|---|
| committer | Peter Maydell | 2016-12-27 15:59:24 +0100 |
| commit | 416d72b97b01d6cb769ad0fd0e10614583354a45 (patch) | |
| tree | 272407530bf562692167eaab26e6525734bc8fc4 /hw/intc | |
| parent | Correct value of ARM Cortex-A8 MVFR1 register. (diff) | |
| download | qemu-416d72b97b01d6cb769ad0fd0e10614583354a45.tar.gz qemu-416d72b97b01d6cb769ad0fd0e10614583354a45.tar.xz qemu-416d72b97b01d6cb769ad0fd0e10614583354a45.zip | |
target-arm: Fix aarch64 vec_reg_offset
Since CPUARMState.vfp.regs is not 16 byte aligned, the ^ 8 fixup used
for a big-endian host doesn't do what's intended. Fix this by adding
in the vfp.regs offset after computing the inter-register offset.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1481085020-2614-2-git-send-email-rth@twiddle.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc')
0 files changed, 0 insertions, 0 deletions