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| author | Richard Henderson | 2018-02-15 19:29:37 +0100 |
|---|---|---|
| committer | Peter Maydell | 2018-02-15 19:29:49 +0100 |
| commit | 4ff55bcb0ee6452b768835f86d94bd727185f812 (patch) | |
| tree | 3f4ca35612be359275df2b0c06f65d50255e0bb0 /hw/intc | |
| parent | target/arm: Enforce access to ZCR_EL at translation (diff) | |
| download | qemu-4ff55bcb0ee6452b768835f86d94bd727185f812.tar.gz qemu-4ff55bcb0ee6452b768835f86d94bd727185f812.tar.xz qemu-4ff55bcb0ee6452b768835f86d94bd727185f812.zip | |
target/arm: Handle SVE registers when using clear_vec_high
When storing to an AdvSIMD FP register, all of the high
bits of the SVE register are zeroed. Therefore, call it
more often with is_q as a parameter.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180211205848.4568-6-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc')
0 files changed, 0 insertions, 0 deletions