diff options
| author | Peter Maydell | 2018-08-14 18:17:19 +0200 |
|---|---|---|
| committer | Peter Maydell | 2018-08-14 18:17:19 +0200 |
| commit | 9739e3767af19096898d63eb9f2f0ff5004797d2 (patch) | |
| tree | ba6dbd85d2e35476b22832489225d1d1bae7e0bc /hw/intc | |
| parent | accel/tcg: Handle get_page_addr_code() returning -1 in tb_check_watchpoint() (diff) | |
| download | qemu-9739e3767af19096898d63eb9f2f0ff5004797d2.tar.gz qemu-9739e3767af19096898d63eb9f2f0ff5004797d2.tar.xz qemu-9739e3767af19096898d63eb9f2f0ff5004797d2.zip | |
accel/tcg: tb_gen_code(): Create single-insn TB for execution from non-RAM
If get_page_addr_code() returns -1, this indicates that there is no RAM
page we can read a full TB from. Instead we must create a TB which
contains a single instruction and which we do not cache, so it is
executed only once.
Since this means we can now have TBs which are not in any page list,
we also need to make tb_phys_invalidate() handle them (by not trying
to remove them from a nonexistent page list).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Emilio G. Cota <cota@braap.org>
Tested-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20180710160013.26559-5-peter.maydell@linaro.org
Diffstat (limited to 'hw/intc')
0 files changed, 0 insertions, 0 deletions