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| author | Bernhard Beschow | 2022-06-03 20:50:40 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé | 2022-06-11 11:44:50 +0200 |
| commit | 19e375db22461b255d32704ad289508e0f1d9947 (patch) | |
| tree | 5c0f04868a92691c8111b2376e94d628a2d850a1 /hw/isa | |
| parent | hw/isa/piix4: Factor out ISABus retrieval from piix4_create() (diff) | |
| download | qemu-19e375db22461b255d32704ad289508e0f1d9947.tar.gz qemu-19e375db22461b255d32704ad289508e0f1d9947.tar.xz qemu-19e375db22461b255d32704ad289508e0f1d9947.zip | |
hw/isa/piix4: QOM'ify PIIX4 PM creation
Just like the real hardware, create the PIIX4 ACPI controller as part of
the PIIX4 southbridge. This also mirrors how the IDE and USB functions
are already created.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220603185045.143789-7-shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'hw/isa')
| -rw-r--r-- | hw/isa/piix4.c | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 96df21a610..d97b245df3 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -49,6 +49,7 @@ struct PIIX4State { RTCState rtc; PCIIDEState ide; UHCIState uhci; + PIIX4PMState pm; /* Reset Control Register */ MemoryRegion rcr_mem; uint8_t rcr; @@ -261,6 +262,13 @@ static void piix4_realize(PCIDevice *dev, Error **errp) return; } + /* ACPI controller */ + qdev_prop_set_int32(DEVICE(&s->pm), "addr", dev->devfn + 3); + if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) { + return; + } + qdev_connect_gpio_out(DEVICE(&s->pm), 0, s->isa[9]); + pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, PIIX_NUM_PIRQS); } @@ -271,6 +279,10 @@ static void piix4_init(Object *obj) object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC); object_initialize_child(obj, "ide", &s->ide, "piix4-ide"); object_initialize_child(obj, "uhci", &s->uhci, "piix4-usb-uhci"); + + object_initialize_child(obj, "pm", &s->pm, TYPE_PIIX4_PM); + qdev_prop_set_uint32(DEVICE(&s->pm), "smb_io_base", 0x1100); + qdev_prop_set_bit(DEVICE(&s->pm), "smm-enabled", 0); } static void piix4_class_init(ObjectClass *klass, void *data) @@ -312,7 +324,7 @@ static void piix4_register_types(void) type_init(piix4_register_types) -DeviceState *piix4_create(PCIBus *pci_bus, I2CBus **smbus) +DeviceState *piix4_create(PCIBus *pci_bus) { PCIDevice *pci; DeviceState *dev; @@ -322,15 +334,5 @@ DeviceState *piix4_create(PCIBus *pci_bus, I2CBus **smbus) TYPE_PIIX4_PCI_DEVICE); dev = DEVICE(pci); - if (smbus) { - pci = pci_new(devfn + 3, TYPE_PIIX4_PM); - qdev_prop_set_uint32(DEVICE(pci), "smb_io_base", 0x1100); - qdev_prop_set_bit(DEVICE(pci), "smm-enabled", 0); - pci_realize_and_unref(pci, pci_bus, &error_fatal); - qdev_connect_gpio_out(DEVICE(pci), 0, - qdev_get_gpio_in_named(dev, "isa", 9)); - *smbus = I2C_BUS(qdev_get_child_bus(DEVICE(pci), "i2c")); - } - return dev; } |