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author | Peter Maydell | 2021-02-09 11:04:51 +0100 |
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committer | Peter Maydell | 2021-02-09 11:04:51 +0100 |
commit | 41d306ec7d9885752fec434904df08b9c1aa3add (patch) | |
tree | 7618d7162f37b9d7424f4fd53f2f0f69d89e0533 /hw/ppc | |
parent | Merge remote-tracking branch 'remotes/philmd-gitlab/tags/integration-testing-... (diff) | |
parent | target/i386: Expose VMX entry/exit load pkrs control bits (diff) | |
download | qemu-41d306ec7d9885752fec434904df08b9c1aa3add.tar.gz qemu-41d306ec7d9885752fec434904df08b9c1aa3add.tar.xz qemu-41d306ec7d9885752fec434904df08b9c1aa3add.zip |
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
* Fuzzing improvements (Qiuhao, Alexander)
* i386: Fix BMI decoding for instructions with the 0x66 prefix (David)
* initial attempt at fixing event_notifier emulation (Maxim)
* i386: PKS emulation, fix for "qemu-system-i386 -cpu host" (myself)
* meson: RBD test fixes (myself)
* meson: TCI warnings (Philippe)
* Leaner build for --disable-guest-agent, --disable-system and
--disable-tools (Philippe, Stefan)
* --enable-tcg-interpreter fix (Richard)
* i386: SVM feature bits (Wei)
* KVM bugfix (Thomas H.)
* Add missing MemoryRegionOps callbacks (PJP)
# gpg: Signature made Mon 08 Feb 2021 14:15:35 GMT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini-gitlab/tags/for-upstream: (46 commits)
target/i386: Expose VMX entry/exit load pkrs control bits
target/i386: Add support for save/load IA32_PKRS MSR
imx7-ccm: add digprog mmio write method
tz-ppc: add dummy read/write methods
spapr_pci: add spapr msi read method
nvram: add nrf51_soc flash read method
prep: add ppc-parity write method
vfio: add quirk device write method
pci-host: designware: add pcie-msi read method
hw/pci-host: add pci-intack write method
cpu-throttle: Remove timer_mod() from cpu_throttle_set()
replay: rng-builtin support
pc-bios/descriptors: fix paths in json files
replay: fix replay of the interrupts
accel/kvm/kvm-all: Fix wrong return code handling in dirty log code
qapi/meson: Restrict UI module to system emulation and tools
qapi/meson: Restrict system-mode specific modules
qapi/meson: Remove QMP from user-mode emulation
qapi/meson: Restrict qdev code to system-mode emulation
meson: Restrict emulation code
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ppc')
-rw-r--r-- | hw/ppc/prep_systemio.c | 8 | ||||
-rw-r--r-- | hw/ppc/spapr_pci.c | 14 |
2 files changed, 20 insertions, 2 deletions
diff --git a/hw/ppc/prep_systemio.c b/hw/ppc/prep_systemio.c index 4e48ef245c..b2bd783248 100644 --- a/hw/ppc/prep_systemio.c +++ b/hw/ppc/prep_systemio.c @@ -23,6 +23,7 @@ */ #include "qemu/osdep.h" +#include "qemu/log.h" #include "hw/irq.h" #include "hw/isa/isa.h" #include "hw/qdev-properties.h" @@ -235,8 +236,15 @@ static uint64_t ppc_parity_error_readl(void *opaque, hwaddr addr, return val; } +static void ppc_parity_error_writel(void *opaque, hwaddr addr, + uint64_t data, unsigned size) +{ + qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid access\n", __func__); +} + static const MemoryRegionOps ppc_parity_error_ops = { .read = ppc_parity_error_readl, + .write = ppc_parity_error_writel, .valid = { .min_access_size = 4, .max_access_size = 4, diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 1b2b940606..24b4972300 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -53,6 +53,7 @@ #include "sysemu/hostmem.h" #include "sysemu/numa.h" #include "hw/ppc/spapr_numa.h" +#include "qemu/log.h" /* Copied from the kernel arch/powerpc/platforms/pseries/msi.c */ #define RTAS_QUERY_FN 0 @@ -739,6 +740,12 @@ static PCIINTxRoute spapr_route_intx_pin_to_irq(void *opaque, int pin) return route; } +static uint64_t spapr_msi_read(void *opaque, hwaddr addr, unsigned size) +{ + qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid access\n", __func__); + return 0; +} + /* * MSI/MSIX memory region implementation. * The handler handles both MSI and MSIX. @@ -756,8 +763,11 @@ static void spapr_msi_write(void *opaque, hwaddr addr, } static const MemoryRegionOps spapr_msi_ops = { - /* There is no .read as the read result is undefined by PCI spec */ - .read = NULL, + /* + * .read result is undefined by PCI spec. + * define .read method to avoid assert failure in memory_region_init_io + */ + .read = spapr_msi_read, .write = spapr_msi_write, .endianness = DEVICE_LITTLE_ENDIAN }; |