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authorPeter Maydell2022-01-21 11:31:25 +0100
committerPeter Maydell2022-01-21 11:31:25 +0100
commit5e9d14f2bea6df89c0675df953f9c839560d2266 (patch)
tree4cfbf3189ca73a5e5372f3b032a3d4cbcb59dd1f /hw/riscv/spike.c
parentMerge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20220120-... (diff)
parenttarget/riscv: Relax UXL field for debugging (diff)
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Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20220121-1' into staging
Third RISC-V PR for QEMU 7.0 * Fixes for OpenTitan timer * Correction of OpenTitan PLIC stride length * RISC-V KVM support * Device tree code cleanup * Support for the Zve64f and Zve32f extensions * OpenSBI binary loading support for the Spike machine * Removal of OpenSBI ELFs * Support for the UXL field in xstatus # gpg: Signature made Fri 21 Jan 2022 05:57:09 GMT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20220121-1: (61 commits) target/riscv: Relax UXL field for debugging target/riscv: Enable uxl field write target/riscv: Set default XLEN for hypervisor target/riscv: Adjust scalar reg in vector with XLEN target/riscv: Adjust vector address with mask target/riscv: Fix check range for first fault only target/riscv: Remove VILL field in VTYPE target/riscv: Adjust vsetvl according to XLEN target/riscv: Split out the vill from vtype target/riscv: Split pm_enabled into mask and base target/riscv: Calculate address according to XLEN target/riscv: Alloc tcg global for cur_pm[mask|base] target/riscv: Create current pm fields in env target/riscv: Adjust csr write mask with XLEN target/riscv: Relax debug check for pm write target/riscv: Use gdb xml according to max mxlen target/riscv: Extend pc for runtime pc write target/riscv: Ignore the pc bits above XLEN target/riscv: Create xl field in env target/riscv: Sign extend pc for different XLEN ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/riscv/spike.c')
-rw-r--r--hw/riscv/spike.c45
1 files changed, 27 insertions, 18 deletions
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 288d69cd9f..d059a67f9b 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -42,6 +42,7 @@
static const MemMapEntry spike_memmap[] = {
[SPIKE_MROM] = { 0x1000, 0xf000 },
+ [SPIKE_HTIF] = { 0x1000000, 0x1000 },
[SPIKE_CLINT] = { 0x2000000, 0x10000 },
[SPIKE_DRAM] = { 0x80000000, 0x0 },
};
@@ -75,6 +76,10 @@ static void create_fdt(SpikeState *s, const MemMapEntry *memmap,
qemu_fdt_add_subnode(fdt, "/htif");
qemu_fdt_setprop_string(fdt, "/htif", "compatible", "ucb,htif0");
+ if (!htif_uses_elf_symbols()) {
+ qemu_fdt_setprop_cells(fdt, "/htif", "reg",
+ 0x0, memmap[SPIKE_HTIF].base, 0x0, memmap[SPIKE_HTIF].size);
+ }
qemu_fdt_add_subnode(fdt, "/soc");
qemu_fdt_setprop(fdt, "/soc", "ranges", NULL, 0);
@@ -172,6 +177,7 @@ static void create_fdt(SpikeState *s, const MemMapEntry *memmap,
if (cmdline) {
qemu_fdt_add_subnode(fdt, "/chosen");
qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", cmdline);
+ qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", "/htif");
}
}
@@ -241,10 +247,6 @@ static void spike_board_init(MachineState *machine)
memory_region_add_subregion(system_memory, memmap[SPIKE_DRAM].base,
machine->ram);
- /* create device tree */
- create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline,
- riscv_is_32bit(&s->soc[0]));
-
/* boot rom */
memory_region_init_rom(mask_rom, NULL, "riscv.spike.mrom",
memmap[SPIKE_MROM].size, &error_fatal);
@@ -258,14 +260,15 @@ static void spike_board_init(MachineState *machine)
*/
if (riscv_is_32bit(&s->soc[0])) {
firmware_end_addr = riscv_find_and_load_firmware(machine,
- RISCV32_BIOS_ELF, memmap[SPIKE_DRAM].base,
+ RISCV32_BIOS_BIN, memmap[SPIKE_DRAM].base,
htif_symbol_callback);
} else {
firmware_end_addr = riscv_find_and_load_firmware(machine,
- RISCV64_BIOS_ELF, memmap[SPIKE_DRAM].base,
+ RISCV64_BIOS_BIN, memmap[SPIKE_DRAM].base,
htif_symbol_callback);
}
+ /* Load kernel */
if (machine->kernel_filename) {
kernel_start_addr = riscv_calc_kernel_start_addr(&s->soc[0],
firmware_end_addr);
@@ -273,17 +276,6 @@ static void spike_board_init(MachineState *machine)
kernel_entry = riscv_load_kernel(machine->kernel_filename,
kernel_start_addr,
htif_symbol_callback);
-
- if (machine->initrd_filename) {
- hwaddr start;
- hwaddr end = riscv_load_initrd(machine->initrd_filename,
- machine->ram_size, kernel_entry,
- &start);
- qemu_fdt_setprop_cell(s->fdt, "/chosen",
- "linux,initrd-start", start);
- qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-end",
- end);
- }
} else {
/*
* If dynamic firmware is used, it doesn't know where is the next mode
@@ -292,6 +284,22 @@ static void spike_board_init(MachineState *machine)
kernel_entry = 0;
}
+ /* Create device tree */
+ create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline,
+ riscv_is_32bit(&s->soc[0]));
+
+ /* Load initrd */
+ if (machine->kernel_filename && machine->initrd_filename) {
+ hwaddr start;
+ hwaddr end = riscv_load_initrd(machine->initrd_filename,
+ machine->ram_size, kernel_entry,
+ &start);
+ qemu_fdt_setprop_cell(s->fdt, "/chosen",
+ "linux,initrd-start", start);
+ qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-end",
+ end);
+ }
+
/* Compute the fdt load address in dram */
fdt_load_addr = riscv_load_fdt(memmap[SPIKE_DRAM].base,
machine->ram_size, s->fdt);
@@ -303,7 +311,8 @@ static void spike_board_init(MachineState *machine)
/* initialize HTIF using symbols found in load_kernel */
htif_mm_init(system_memory, mask_rom,
- &s->soc[0].harts[0].env, serial_hd(0));
+ &s->soc[0].harts[0].env, serial_hd(0),
+ memmap[SPIKE_HTIF].base);
}
static void spike_machine_instance_init(Object *obj)