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| author | Alistair Francis | 2017-12-13 18:59:26 +0100 |
|---|---|---|
| committer | Peter Maydell | 2017-12-13 18:59:26 +0100 |
| commit | cbf8b991f8a3ea293a6b43c6f4738cc0e19c722c (patch) | |
| tree | e80a38ade4ccffacdfbbedbbce48dd694b0c6195 /hw/ssi | |
| parent | MAINTAINERS: replace the unavailable email address (diff) | |
| download | qemu-cbf8b991f8a3ea293a6b43c6f4738cc0e19c722c.tar.gz qemu-cbf8b991f8a3ea293a6b43c6f4738cc0e19c722c.tar.xz qemu-cbf8b991f8a3ea293a6b43c6f4738cc0e19c722c.zip | |
xilinx_spips: Update the QSPI Mod ID reset value
Update the reset value to match the latest ZynqMP register spec.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Message-id: c03e51d041db7f055596084891aeb1e856e32b9f.1513104804.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ssi')
| -rw-r--r-- | hw/ssi/xilinx_spips.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index ad1b2ba79f..899db814ee 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -355,6 +355,7 @@ static void xlnx_zynqmp_qspips_reset(DeviceState *d) s->regs[R_GQSPI_RX_THRESH] = 1; s->regs[R_GQSPI_GFIFO_THRESH] = 1; s->regs[R_GQSPI_IMR] = GQSPI_IXR_MASK; + s->regs[R_MOD_ID] = 0x01090101; s->man_start_com_g = false; s->gqspi_irqline = 0; xlnx_zynqmp_qspips_update_ixr(s); |