diff options
| author | Bin Meng | 2020-09-03 12:40:12 +0200 |
|---|---|---|
| committer | Alistair Francis | 2020-09-10 00:54:19 +0200 |
| commit | 89ece6f76f089bc415fc4b8c78f7dbe74113380c (patch) | |
| tree | bbebaf8350b1b2ca6d9331782dd7d6b544b853c9 /include/hw | |
| parent | hw/riscv: sifive_u: Connect a DMA controller (diff) | |
| download | qemu-89ece6f76f089bc415fc4b8c78f7dbe74113380c.tar.gz qemu-89ece6f76f089bc415fc4b8c78f7dbe74113380c.tar.xz qemu-89ece6f76f089bc415fc4b8c78f7dbe74113380c.zip | |
hw/riscv: Move sifive_e_prci model to hw/misc
This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move sifive_e_prci model to hw/misc directory.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1599129623-68957-2-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/misc/sifive_e_prci.h (renamed from include/hw/riscv/sifive_e_prci.h) | 0 |
1 files changed, 0 insertions, 0 deletions
diff --git a/include/hw/riscv/sifive_e_prci.h b/include/hw/misc/sifive_e_prci.h index 698b0b451c..698b0b451c 100644 --- a/include/hw/riscv/sifive_e_prci.h +++ b/include/hw/misc/sifive_e_prci.h |