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| author | Andrew Jeffery | 2019-07-01 18:26:16 +0200 |
|---|---|---|
| committer | Peter Maydell | 2019-07-01 18:28:59 +0200 |
| commit | 58044b5cf5f30eb298709696ddbafdf547c1291c (patch) | |
| tree | 937fdc58114c448757c26e746c52b947654c4f93 /scripts/qapi | |
| parent | aspeed/timer: Fix behaviour running Linux (diff) | |
| download | qemu-58044b5cf5f30eb298709696ddbafdf547c1291c.tar.gz qemu-58044b5cf5f30eb298709696ddbafdf547c1291c.tar.xz qemu-58044b5cf5f30eb298709696ddbafdf547c1291c.zip | |
aspeed/timer: Status register contains reload for stopped timer
From the datasheet:
This register stores the current status of counter #N. When timer
enable bit TMC30[N * b] is disabled, the reload register will be
loaded into this counter. When timer bit TMC30[N * b] is set, the
counter will start to decrement. CPU can update this register value
when enable bit is set.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190618165311.27066-9-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts/qapi')
0 files changed, 0 insertions, 0 deletions