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| author | Peter Maydell | 2016-02-23 16:36:43 +0100 |
|---|---|---|
| committer | Peter Maydell | 2016-02-26 16:09:41 +0100 |
| commit | 50866ba5a2cfe922aaf3edb79f6eac5b0653477a (patch) | |
| tree | 39acd126ce238393135ebce39ea3ef42560ce58e /target-arm/cpu.h | |
| parent | target-arm: Give CPSR setting on 32-bit exception return its own helper (diff) | |
| download | qemu-50866ba5a2cfe922aaf3edb79f6eac5b0653477a.tar.gz qemu-50866ba5a2cfe922aaf3edb79f6eac5b0653477a.tar.xz qemu-50866ba5a2cfe922aaf3edb79f6eac5b0653477a.zip | |
target-arm: Add write_type argument to cpsr_write()
Add an argument to cpsr_write() to indicate what kind of CPSR
write is being requested, since the exact behaviour should
differ for the different cases.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
Message-id: 1455556977-3644-3-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm/cpu.h')
| -rw-r--r-- | target-arm/cpu.h | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 3cbda73578..87720d4267 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -718,8 +718,17 @@ static inline void pstate_write(CPUARMState *env, uint32_t val) /* Return the current CPSR value. */ uint32_t cpsr_read(CPUARMState *env); -/* Set the CPSR. Note that some bits of mask must be all-set or all-clear. */ -void cpsr_write(CPUARMState *env, uint32_t val, uint32_t mask); + +typedef enum CPSRWriteType { + CPSRWriteByInstr = 0, /* from guest MSR or CPS */ + CPSRWriteExceptionReturn = 1, /* from guest exception return insn */ + CPSRWriteRaw = 2, /* trust values, do not switch reg banks */ + CPSRWriteByGDBStub = 3, /* from the GDB stub */ +} CPSRWriteType; + +/* Set the CPSR. Note that some bits of mask must be all-set or all-clear.*/ +void cpsr_write(CPUARMState *env, uint32_t val, uint32_t mask, + CPSRWriteType write_type); /* Return the current xPSR value. */ static inline uint32_t xpsr_read(CPUARMState *env) |