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| author | Peter Maydell | 2014-04-15 20:18:43 +0200 |
|---|---|---|
| committer | Peter Maydell | 2014-04-17 22:34:04 +0200 |
| commit | a65f1de982302f5c33f668ad25a120eba7993d37 (patch) | |
| tree | 68af19a05242c14ebb938b889a9f5be3728fdb94 /target-arm/helper.c | |
| parent | target-arm: Implement SP_EL0, SP_EL1 (diff) | |
| download | qemu-a65f1de982302f5c33f668ad25a120eba7993d37.tar.gz qemu-a65f1de982302f5c33f668ad25a120eba7993d37.tar.xz qemu-a65f1de982302f5c33f668ad25a120eba7993d37.zip | |
target-arm: Implement AArch64 SPSR_EL1
Implement the AArch64 SPSR_EL1. For compatibility with how KVM
handles SPSRs and with the architectural mapping between AArch32
and AArch64, we put this in the banked_spsr[] array in the slot
that is used for SVC in AArch32. This means we need to extend the
array from uint32_t to uint64_t, which requires some reworking
of the 32 bit KVM save/restore code.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Diffstat (limited to 'target-arm/helper.c')
| -rw-r--r-- | target-arm/helper.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index 27a3dc2a75..68f8c6a832 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1936,6 +1936,10 @@ static const ARMCPRegInfo v8_cp_reginfo[] = { .type = ARM_CP_NO_MIGRATE, .opc0 = 3, .opc1 = 0, .crn = 4, .crm = 0, .opc2 = 1, .access = PL1_RW, .fieldoffset = offsetof(CPUARMState, elr_el1) }, + { .name = "SPSR_EL1", .state = ARM_CP_STATE_AA64, + .type = ARM_CP_NO_MIGRATE, + .opc0 = 3, .opc1 = 0, .crn = 4, .crm = 0, .opc2 = 0, + .access = PL1_RW, .fieldoffset = offsetof(CPUARMState, banked_spsr[0]) }, /* We rely on the access checks not allowing the guest to write to the * state field when SPSel indicates that it's being used as the stack * pointer. |