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authorPeter Crosthwaite2015-06-15 19:06:10 +0200
committerPeter Maydell2015-06-15 19:06:10 +0200
commita8e81b319d1ae1224cc7059877dcdf04a5aad59d (patch)
tree82ea3a2bd89c848a1135e183a157bf12a9968e4e /target-arm/helper.c
parentarm: Refactor get_phys_addr FSR return mechanism (diff)
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arm: Implement uniprocessor with MP config
Add a boolean for indicating uniprocessors with MP extensions. This drives the U bit in MPIDR. Prepares support for Cortex-R5. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: a70a80583df265e0174f01fa1fc92b33ea6d1db5.1434066412.git.peter.crosthwaite@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r--target-arm/helper.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index f51dece2fe..f038a03a6c 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2075,9 +2075,11 @@ static uint64_t mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri)
mpidr |= (1U << 31);
/* Cores which are uniprocessor (non-coherent)
* but still implement the MP extensions set
- * bit 30. (For instance, A9UP.) However we do
- * not currently model any of those cores.
+ * bit 30. (For instance, Cortex-R5).
*/
+ if (cpu->mp_is_up) {
+ mpidr |= (1u << 30);
+ }
}
return mpidr;
}