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authorAnthony Liguori2013-07-27 00:53:19 +0200
committerAnthony Liguori2013-07-27 00:53:19 +0200
commit200a06397f5d3e982028fd78b25b420507ade021 (patch)
treefdbace65f82e15031ce99db4afdb3f592bb24032 /target-lm32/gdbstub.c
parentsun4m: add display width and height to the firmware configuration (diff)
parentcpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XML (diff)
downloadqemu-200a06397f5d3e982028fd78b25b420507ade021.tar.gz
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Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging
QOM CPUState refactorings * Fix cpu_memory_rw_debug() breakage in s390x KVM * Replace final CPUArchState in sysemu/kvm.h * Introduce model subclasses for XtensaCPU * Introduce CPUClass::gdb_num[_core]_regs * Introduce CPUClass::gdb_core_xml_file * Introduce CPUClass::gdb_{read,write}_register() * Propagate CPUState further in gdbstub # gpg: Signature made Fri 26 Jul 2013 05:04:28 PM CDT using RSA key ID 3E7E013F # gpg: Can't check signature: public key not found # By Andreas Färber (23) and others # Via Andreas Färber * afaerber/tags/qom-cpu-for-anthony: (25 commits) cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XML target-cris: Factor out CPUClass::gdb_read_register() hook for v10 cpu: Introduce CPUClass::gdb_{read,write}_register() gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functions target-xtensa: Move cpu_gdb_{read,write}_register() target-lm32: Move cpu_gdb_{read,write}_register() target-s390x: Move cpu_gdb_{read,write}_register() target-alpha: Move cpu_gdb_{read,write}_register() target-cris: Move cpu_gdb_{read,write}_register() target-microblaze: Move cpu_gdb_{read,write}_register() target-sh4: Move cpu_gdb_{read,write}_register() target-openrisc: Move cpu_gdb_{read,write}_register() target-mips: Move cpu_gdb_{read,write}_register() target-m68k: Move cpu_gdb_{read,write}_register() target-arm: Move cpu_gdb_{read,write}_register() target-sparc: Move cpu_gdb_{read,write}_register() target-ppc: Move cpu_gdb_{read,write}_register() target-i386: Move cpu_gdb_{read,write}_register() cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs gdbstub: Drop dead code in cpu_gdb_{read,write}_register() ...
Diffstat (limited to 'target-lm32/gdbstub.c')
-rw-r--r--target-lm32/gdbstub.c92
1 files changed, 92 insertions, 0 deletions
diff --git a/target-lm32/gdbstub.c b/target-lm32/gdbstub.c
new file mode 100644
index 0000000000..4979a98d74
--- /dev/null
+++ b/target-lm32/gdbstub.c
@@ -0,0 +1,92 @@
+/*
+ * LM32 gdb server stub
+ *
+ * Copyright (c) 2003-2005 Fabrice Bellard
+ * Copyright (c) 2013 SUSE LINUX Products GmbH
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+#include "config.h"
+#include "qemu-common.h"
+#include "exec/gdbstub.h"
+#include "hw/lm32/lm32_pic.h"
+
+int lm32_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+{
+ LM32CPU *cpu = LM32_CPU(cs);
+ CPULM32State *env = &cpu->env;
+
+ if (n < 32) {
+ return gdb_get_reg32(mem_buf, env->regs[n]);
+ } else {
+ switch (n) {
+ case 32:
+ return gdb_get_reg32(mem_buf, env->pc);
+ /* FIXME: put in right exception ID */
+ case 33:
+ return gdb_get_reg32(mem_buf, 0);
+ case 34:
+ return gdb_get_reg32(mem_buf, env->eba);
+ case 35:
+ return gdb_get_reg32(mem_buf, env->deba);
+ case 36:
+ return gdb_get_reg32(mem_buf, env->ie);
+ case 37:
+ return gdb_get_reg32(mem_buf, lm32_pic_get_im(env->pic_state));
+ case 38:
+ return gdb_get_reg32(mem_buf, lm32_pic_get_ip(env->pic_state));
+ }
+ }
+ return 0;
+}
+
+int lm32_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
+{
+ LM32CPU *cpu = LM32_CPU(cs);
+ CPUClass *cc = CPU_GET_CLASS(cs);
+ CPULM32State *env = &cpu->env;
+ uint32_t tmp;
+
+ if (n > cc->gdb_num_core_regs) {
+ return 0;
+ }
+
+ tmp = ldl_p(mem_buf);
+
+ if (n < 32) {
+ env->regs[n] = tmp;
+ } else {
+ switch (n) {
+ case 32:
+ env->pc = tmp;
+ break;
+ case 34:
+ env->eba = tmp;
+ break;
+ case 35:
+ env->deba = tmp;
+ break;
+ case 36:
+ env->ie = tmp;
+ break;
+ case 37:
+ lm32_pic_set_im(env->pic_state, tmp);
+ break;
+ case 38:
+ lm32_pic_set_ip(env->pic_state, tmp);
+ break;
+ }
+ }
+ return 4;
+}