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| author | Benjamin Herrenschmidt | 2015-10-22 09:30:59 +0200 |
|---|---|---|
| committer | David Gibson | 2015-10-23 03:22:40 +0200 |
| commit | 90da0d5a703839c8db9f37355107955df043b654 (patch) | |
| tree | d452e0a5e18a1b1d5536ffae695c1348ab618418 /target-ppc/cpu.h | |
| parent | ppc: Add mmu_model defines for arch 2.03 and 2.07 (diff) | |
| download | qemu-90da0d5a703839c8db9f37355107955df043b654.tar.gz qemu-90da0d5a703839c8db9f37355107955df043b654.tar.xz qemu-90da0d5a703839c8db9f37355107955df043b654.zip | |
ppc/spapr: Add "ibm,pa-features" property to the device-tree
LoPAPR defines a "ibm,pa-features" per-CPU device tree property which
describes extended features of the Processor Architecture.
This adds the property to the device tree. At the moment this is the
copy of what pHyp advertises except "I=1 (cache inhibited) Large Pages"
which is enabled for TCG and disabled when running under HV KVM host
with 4K system page size.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[aik: rebased, changed commit log, moved ci_large_pages initialization,
renamed pa_features arrays]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 69d8cf6bd2..b34aed6a19 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1073,6 +1073,7 @@ struct CPUPPCState { uint64_t insns_flags2; #if defined(TARGET_PPC64) struct ppc_segment_page_sizes sps; + bool ci_large_pages; #endif #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY) |