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| author | Richard Henderson | 2018-05-18 18:48:08 +0200 |
|---|---|---|
| committer | Peter Maydell | 2018-05-18 18:48:08 +0200 |
| commit | 028e2a7b876631eff165cac59eb43bdb2dcc213b (patch) | |
| tree | 57d7c599b16fb58b73a0201136dc94f4a2ac9004 /target/arm/cpu.h | |
| parent | target/arm: Implement SVE Predicate Logical Operations Group (diff) | |
| download | qemu-028e2a7b876631eff165cac59eb43bdb2dcc213b.tar.gz qemu-028e2a7b876631eff165cac59eb43bdb2dcc213b.tar.xz qemu-028e2a7b876631eff165cac59eb43bdb2dcc213b.zip | |
target/arm: Implement SVE Predicate Misc Group
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index df21e143cc..8488273c5b 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -540,6 +540,7 @@ typedef struct CPUARMState { #ifdef TARGET_AARCH64 /* Store FFR as pregs[16] to make it easier to treat as any other. */ +#define FFR_PRED_NUM 16 ARMPredicateReg pregs[17]; /* Scratch space for aa64 sve predicate temporary. */ ARMPredicateReg preg_tmp; @@ -2975,4 +2976,7 @@ static inline uint64_t *aa64_vfp_qreg(CPUARMState *env, unsigned regno) return &env->vfp.zregs[regno].d[0]; } +/* Shared between translate-sve.c and sve_helper.c. */ +extern const uint64_t pred_esz_masks[4]; + #endif |