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author | Peter Maydell | 2020-11-19 22:56:13 +0100 |
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committer | Peter Maydell | 2020-12-10 12:44:56 +0100 |
commit | 194cde6df20d139dbb952ef6c8c011f2126d03a4 (patch) | |
tree | 6da23e6b16f40ce348318030d75119f7a2f35f8c /target/arm/cpu.h | |
parent | target/arm: Implement CCR_S.TRD behaviour for SG insns (diff) | |
download | qemu-194cde6df20d139dbb952ef6c8c011f2126d03a4.tar.gz qemu-194cde6df20d139dbb952ef6c8c011f2126d03a4.tar.xz qemu-194cde6df20d139dbb952ef6c8c011f2126d03a4.zip |
hw/intc/armv7m_nvic: Fix "return from inactive handler" check
In commit 077d7449100d824a4 we added code to handle the v8M
requirement that returns from NMI or HardFault forcibly deactivate
those exceptions regardless of what interrupt the guest is trying to
deactivate. Unfortunately this broke the handling of the "illegal
exception return because the returning exception number is not
active" check for those cases. In the pseudocode this test is done
on the exception the guest asks to return from, but because our
implementation was doing this in armv7m_nvic_complete_irq() after the
new "deactivate NMI/HardFault regardless" code we ended up doing the
test on the VecInfo for that exception instead, which usually meant
failing to raise the illegal exception return fault.
In the case for "configurable exception targeting the opposite
security state" we detected the illegal-return case but went ahead
and deactivated the VecInfo anyway, which is wrong because that is
the VecInfo for the other security state.
Rearrange the code so that we first identify the illegal return
cases, then see if we really need to deactivate NMI or HardFault
instead, and finally do the deactivation.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201119215617.29887-25-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.h')
0 files changed, 0 insertions, 0 deletions