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| author | Peter Maydell | 2017-09-07 14:54:52 +0200 |
|---|---|---|
| committer | Peter Maydell | 2017-09-07 14:54:52 +0200 |
| commit | 6d8048341995b31a77dc2e0dcaaf4e3df0e3121a (patch) | |
| tree | e858f528c7965d322cbcbd6b3f185898adc9b85d /target/arm/cpu.h | |
| parent | target/arm: Make BASEPRI register banked for v8M (diff) | |
| download | qemu-6d8048341995b31a77dc2e0dcaaf4e3df0e3121a.tar.gz qemu-6d8048341995b31a77dc2e0dcaaf4e3df0e3121a.tar.xz qemu-6d8048341995b31a77dc2e0dcaaf4e3df0e3121a.zip | |
target/arm: Make PRIMASK register banked for v8M
Make the PRIMASK register banked if v8M security extensions are enabled.
Note that we do not yet implement the functionality of the new
AIRCR.PRIS bit (which allows the effect of the NS copy of PRIMASK to
be restricted).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1503414539-28762-8-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 273abc3dc5..26ec744af0 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -431,7 +431,7 @@ typedef struct CPUARMState { uint32_t bfar; /* BusFault Address */ unsigned mpu_ctrl; /* MPU_CTRL */ int exception; - uint32_t primask; + uint32_t primask[2]; uint32_t faultmask; uint32_t secure; /* Is CPU in Secure state? (not guest visible) */ } v7m; |