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authorPeter Maydell2017-09-07 14:54:53 +0200
committerPeter Maydell2017-09-07 14:54:53 +0200
commit8bfc26ea302ec03585d7258a7cf8938f76512730 (patch)
treec2e5e00a8f00eed55cec0c2ac9ce6d620023567f /target/arm/cpu.h
parenttarget/arm: Make FAULTMASK register banked for v8M (diff)
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target/arm: Make CONTROL register banked for v8M
Make the CONTROL register banked if v8M security extensions are enabled. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1503414539-28762-10-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r--target/arm/cpu.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 5cf2e76ffc..1d9eb369cc 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -422,7 +422,7 @@ typedef struct CPUARMState {
uint32_t other_sp;
uint32_t vecbase;
uint32_t basepri[2];
- uint32_t control;
+ uint32_t control[2];
uint32_t ccr; /* Configuration and Control */
uint32_t cfsr; /* Configurable Fault Status */
uint32_t hfsr; /* HardFault Status */
@@ -1681,7 +1681,8 @@ static inline bool arm_v7m_is_handler_mode(CPUARMState *env)
static inline int arm_current_el(CPUARMState *env)
{
if (arm_feature(env, ARM_FEATURE_M)) {
- return arm_v7m_is_handler_mode(env) || !(env->v7m.control & 1);
+ return arm_v7m_is_handler_mode(env) ||
+ !(env->v7m.control[env->v7m.secure] & 1);
}
if (is_a64(env)) {