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| author | Rémi Denis-Courmont | 2021-01-12 11:45:07 +0100 |
|---|---|---|
| committer | Peter Maydell | 2021-01-19 15:38:52 +0100 |
| commit | 9861248f637ecf11113b04b0b5c7b13c9aa06f09 (patch) | |
| tree | ab672e892f18a1b7958025416ef720082c0fb11f /target/arm/cpu.h | |
| parent | target/arm: secure stage 2 translation regime (diff) | |
| download | qemu-9861248f637ecf11113b04b0b5c7b13c9aa06f09.tar.gz qemu-9861248f637ecf11113b04b0b5c7b13c9aa06f09.tar.xz qemu-9861248f637ecf11113b04b0b5c7b13c9aa06f09.zip | |
target/arm: set HPFAR_EL2.NS on secure stage 2 faults
Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210112104511.36576-15-remi.denis.courmont@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 235df64cd7..b115da5935 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1484,6 +1484,8 @@ static inline void xpsr_write(CPUARMState *env, uint32_t val, uint32_t mask) #define HCR_TWEDEN (1ULL << 59) #define HCR_TWEDEL MAKE_64BIT_MASK(60, 4) +#define HPFAR_NS (1ULL << 63) + #define SCR_NS (1U << 0) #define SCR_IRQ (1U << 1) #define SCR_FIQ (1U << 2) |