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authorRichard Henderson2019-03-01 21:04:58 +0100
committerPeter Maydell2019-03-05 16:55:08 +0100
commitb89d9c988a988d5547c73e2bc43f59b0c07420a5 (patch)
tree43b267076b3450e878d46af81d4b9608a5c6456a /target/arm/cpu.h
parenttarget/arm: Rearrange disas_data_proc_reg (diff)
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target/arm: Implement ARMv8.4-CondM
Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190301200501.16533-8-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: fixed up block comment style] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r--target/arm/cpu.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index c822f94236..fc2909ea6d 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3431,6 +3431,11 @@ static inline bool isar_feature_aa64_fhm(const ARMISARegisters *id)
return FIELD_EX64(id->id_aa64isar0, ID_AA64ISAR0, FHM) != 0;
}
+static inline bool isar_feature_aa64_condm_4(const ARMISARegisters *id)
+{
+ return FIELD_EX64(id->id_aa64isar0, ID_AA64ISAR0, TS) != 0;
+}
+
static inline bool isar_feature_aa64_jscvt(const ARMISARegisters *id)
{
return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, JSCVT) != 0;