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| author | Wei Huang | 2017-02-10 18:40:28 +0100 |
|---|---|---|
| committer | Peter Maydell | 2017-02-10 18:40:28 +0100 |
| commit | e6ec54571e424bb1d6e50e32fe317c616cde3e05 (patch) | |
| tree | 8be4aebba02febe6c12d080036e760f92b7933dc /target/arm/cpu.h | |
| parent | target-arm: Add support for AArch64 PMU register PMXEVTYPER_EL0 (diff) | |
| download | qemu-e6ec54571e424bb1d6e50e32fe317c616cde3e05.tar.gz qemu-e6ec54571e424bb1d6e50e32fe317c616cde3e05.tar.xz qemu-e6ec54571e424bb1d6e50e32fe317c616cde3e05.zip | |
target-arm: Add support for PMU register PMINTENSET_EL1
This patch adds access support for PMINTENSET_EL1.
Signed-off-by: Wei Huang <wei@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1486504171-26807-4-git-send-email-wei@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index edc1f761ce..0956a54e89 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -309,7 +309,7 @@ typedef struct CPUARMState { uint32_t c9_pmovsr; /* perf monitor overflow status */ uint32_t c9_pmuserenr; /* perf monitor user enable */ uint64_t c9_pmselr; /* perf monitor counter selection register */ - uint32_t c9_pminten; /* perf monitor interrupt enables */ + uint64_t c9_pminten; /* perf monitor interrupt enables */ union { /* Memory attribute redirection */ struct { #ifdef HOST_WORDS_BIGENDIAN |