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| author | Peter Maydell | 2020-11-19 22:56:09 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-12-10 12:44:56 +0100 |
| commit | fe6fa228a71f0eb8b8ee315452e6a7736c537b1f (patch) | |
| tree | bef043f021a9dc5ac7ed5cb5e3f3f4ce009a3b35 /target/arm/m-nocp.decode | |
| parent | target/arm: Implement new v8.1M NOCP check for exception return (diff) | |
| download | qemu-fe6fa228a71f0eb8b8ee315452e6a7736c537b1f.tar.gz qemu-fe6fa228a71f0eb8b8ee315452e6a7736c537b1f.tar.xz qemu-fe6fa228a71f0eb8b8ee315452e6a7736c537b1f.zip | |
target/arm: Implement new v8.1M VLLDM and VLSTM encodings
v8.1M adds new encodings of VLLDM and VLSTM (where bit 7 is set).
The only difference is that:
* the old T1 encodings UNDEF if the implementation implements 32
Dregs (this is currently architecturally impossible for M-profile)
* the new T2 encodings have the implementation-defined option to
read from memory (discarding the data) or write UNKNOWN values to
memory for the stack slots that would be D16-D31
We choose not to make those accesses, so for us the two
instructions behave identically assuming they don't UNDEF.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201119215617.29887-21-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/m-nocp.decode')
| -rw-r--r-- | target/arm/m-nocp.decode | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/m-nocp.decode b/target/arm/m-nocp.decode index ccd62e8739..6699626d7c 100644 --- a/target/arm/m-nocp.decode +++ b/target/arm/m-nocp.decode @@ -36,7 +36,7 @@ { # Special cases which do not take an early NOCP: VLLDM and VLSTM - VLLDM_VLSTM 1110 1100 001 l:1 rn:4 0000 1010 0000 0000 + VLLDM_VLSTM 1110 1100 001 l:1 rn:4 0000 1010 op:1 000 0000 # VSCCLRM (new in v8.1M) is similar: VSCCLRM 1110 1100 1.01 1111 .... 1011 imm:7 0 vd=%vd_dp size=3 VSCCLRM 1110 1100 1.01 1111 .... 1010 imm:8 vd=%vd_sp size=2 |