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author | Richard Henderson | 2021-05-26 00:58:08 +0200 |
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committer | Peter Maydell | 2021-06-03 17:43:26 +0200 |
commit | 3a98ac40fa9fca85bb37f4281e872b7519e733c5 (patch) | |
tree | 3bdeb6c155cb03d4830914dc6647852d9e446375 /target/arm/translate-a64.c | |
parent | target/arm: Unify unallocated path in disas_fp_1src (diff) | |
download | qemu-3a98ac40fa9fca85bb37f4281e872b7519e733c5.tar.gz qemu-3a98ac40fa9fca85bb37f4281e872b7519e733c5.tar.xz qemu-3a98ac40fa9fca85bb37f4281e872b7519e733c5.zip |
target/arm: Implement scalar float32 to bfloat16 conversion
This is the 64-bit BFCVT and the 32-bit VCVT{B,T}.BF16.F32.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210525225817.400336-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-a64.c')
-rw-r--r-- | target/arm/translate-a64.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 95c2853f39..b335ca8735 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -6280,6 +6280,9 @@ static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn) case 0x3: /* FSQRT */ gen_helper_vfp_sqrts(tcg_res, tcg_op, cpu_env); goto done; + case 0x6: /* BFCVT */ + gen_fpst = gen_helper_bfcvt; + break; case 0x8: /* FRINTN */ case 0x9: /* FRINTP */ case 0xa: /* FRINTM */ @@ -6557,6 +6560,22 @@ static void disas_fp_1src(DisasContext *s, uint32_t insn) } break; + case 0x6: + switch (type) { + case 1: /* BFCVT */ + if (!dc_isar_feature(aa64_bf16, s)) { + goto do_unallocated; + } + if (!fp_access_check(s)) { + return; + } + handle_fp_1src_single(s, opcode, rd, rn); + break; + default: + goto do_unallocated; + } + break; + default: do_unallocated: unallocated_encoding(s); |