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| author | Xiaoyao Li | 2020-03-16 10:56:05 +0100 |
|---|---|---|
| committer | Eduardo Habkost | 2020-04-01 00:13:32 +0200 |
| commit | d965dc35592d24c0c1519f1c566223c6277cb80e (patch) | |
| tree | 4ded2dfed8e9211a6efa16958bcda466220faf5c /target/i386 | |
| parent | target/i386: set the CPUID level to 0x14 on old machine-type (diff) | |
| download | qemu-d965dc35592d24c0c1519f1c566223c6277cb80e.tar.gz qemu-d965dc35592d24c0c1519f1c566223c6277cb80e.tar.xz qemu-d965dc35592d24c0c1519f1c566223c6277cb80e.zip | |
target/i386: Add ARCH_CAPABILITIES related bits into Icelake-Server CPU model
Current Icelake-Server CPU model lacks all the features enumerated by
MSR_IA32_ARCH_CAPABILITIES.
Add them, so that guest of "Icelake-Server" can see all of them.
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Message-Id: <20200316095605.12318-1-xiaoyao.li@intel.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'target/i386')
| -rw-r--r-- | target/i386/cpu.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index f3b25c7301..90ffc5f3b1 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3471,6 +3471,19 @@ static X86CPUDefinition builtin_x86_defs[] = { { /* end of list */ } }, }, + { + .version = 3, + .props = (PropValue[]) { + { "arch-capabilities", "on" }, + { "rdctl-no", "on" }, + { "ibrs-all", "on" }, + { "skip-l1dfl-vmentry", "on" }, + { "mds-no", "on" }, + { "pschange-mc-no", "on" }, + { "taa-no", "on" }, + { /* end of list */ } + }, + }, { /* end of list */ } } }, |