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author | Claudio Fontana | 2021-02-04 17:39:23 +0100 |
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committer | Richard Henderson | 2021-02-05 21:24:15 +0100 |
commit | 78271684719f34c1cc19f895e089f2f19b69698d (patch) | |
tree | 5f47406eb8c2be4e37e411e5053678e4d91e09d3 /target/microblaze | |
parent | cpu: move debug_check_watchpoint to tcg_ops (diff) | |
download | qemu-78271684719f34c1cc19f895e089f2f19b69698d.tar.gz qemu-78271684719f34c1cc19f895e089f2f19b69698d.tar.xz qemu-78271684719f34c1cc19f895e089f2f19b69698d.zip |
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
we cannot in principle make the TCG Operations field definitions
conditional on CONFIG_TCG in code that is included by both common_ss
and specific_ss modules.
Therefore, what we can do safely to restrict the TCG fields to TCG-only
builds, is to move all tcg cpu operations into a separate header file,
which is only included by TCG, target-specific code.
This leaves just a NULL pointer in the cpu.h for the non-TCG builds.
This also tidies up the code in all targets a bit, having all TCG cpu
operations neatly contained by a dedicated data struct.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20210204163931.7358-16-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/microblaze')
-rw-r--r-- | target/microblaze/cpu.c | 25 |
1 files changed, 18 insertions, 7 deletions
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 6678310f51..433ba20203 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -352,6 +352,21 @@ static ObjectClass *mb_cpu_class_by_name(const char *cpu_model) return object_class_by_name(TYPE_MICROBLAZE_CPU); } +#include "hw/core/tcg-cpu-ops.h" + +static struct TCGCPUOps mb_tcg_ops = { + .initialize = mb_tcg_init, + .synchronize_from_tb = mb_cpu_synchronize_from_tb, + .cpu_exec_interrupt = mb_cpu_exec_interrupt, + .tlb_fill = mb_cpu_tlb_fill, + +#ifndef CONFIG_USER_ONLY + .do_interrupt = mb_cpu_do_interrupt, + .do_transaction_failed = mb_cpu_transaction_failed, + .do_unaligned_access = mb_cpu_do_unaligned_access, +#endif /* !CONFIG_USER_ONLY */ +}; + static void mb_cpu_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); @@ -364,17 +379,13 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = mb_cpu_class_by_name; cc->has_work = mb_cpu_has_work; - cc->tcg_ops.do_interrupt = mb_cpu_do_interrupt; - cc->tcg_ops.cpu_exec_interrupt = mb_cpu_exec_interrupt; + cc->dump_state = mb_cpu_dump_state; cc->set_pc = mb_cpu_set_pc; - cc->tcg_ops.synchronize_from_tb = mb_cpu_synchronize_from_tb; cc->gdb_read_register = mb_cpu_gdb_read_register; cc->gdb_write_register = mb_cpu_gdb_write_register; - cc->tcg_ops.tlb_fill = mb_cpu_tlb_fill; + #ifndef CONFIG_USER_ONLY - cc->tcg_ops.do_transaction_failed = mb_cpu_transaction_failed; - cc->tcg_ops.do_unaligned_access = mb_cpu_do_unaligned_access; cc->get_phys_page_attrs_debug = mb_cpu_get_phys_page_attrs_debug; dc->vmsd = &vmstate_mb_cpu; #endif @@ -382,7 +393,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_num_core_regs = 32 + 27; cc->disas_set_info = mb_disas_set_info; - cc->tcg_ops.initialize = mb_tcg_init; + cc->tcg_ops = &mb_tcg_ops; } static const TypeInfo mb_cpu_type_info = { |