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* accel/tcg: Remove will_exit argument from cpu_restore_stateRichard Henderson2022-10-311-1/+1
* target/microblaze: Convert to tcg_ops restore_state_to_opcRichard Henderson2022-10-262-7/+11
* accel/tcg: Introduce tb_pc and log_pcRichard Henderson2022-10-041-1/+1
* hw/core: Add CPUClass.get_pcRichard Henderson2022-10-041-0/+8
* accel/tcg: Add pc and host_pc params to gen_intermediate_codeRichard Henderson2022-09-061-2/+3
* Normalize header guard symbol definitionMarkus Armbruster2022-05-111-1/+1
* compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau2022-04-211-3/+3
* exec/translator: Pass the locked filepointer to disas_log hookRichard Henderson2022-04-201-3/+4
* Move CPU softfloat unions to cpu-float.hMarc-André Lureau2022-04-061-1/+1
* target: Use ArchCPU as interface to target CPUPhilippe Mathieu-Daudé2022-03-061-1/+1
* target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macroPhilippe Mathieu-Daudé2022-03-062-4/+1Star
* target: Use CPUArchState as interface to target-specific CPU statePhilippe Mathieu-Daudé2022-03-061-3/+2Star
* target: Include missing 'cpu.h'Philippe Mathieu-Daudé2022-03-061-0/+2
* exec/exec-all: Move 'qemu/log.h' include in units requiring itPhilippe Mathieu-Daudé2022-02-213-0/+3
* target/microblaze: Do not set MO_ALIGN for user-onlyRichard Henderson2021-11-021-0/+16
* target/microblaze: Make mb_cpu_tlb_fill sysemu onlyRichard Henderson2021-11-023-17/+6Star
* target/microblaze: Drop checks for singlestep_enabledRichard Henderson2021-10-161-12/+2Star
* target/microblaze: Check CF_NO_GOTO_TB for DISAS_JUMPRichard Henderson2021-10-161-2/+2
* hw/core: Make do_unaligned_access noreturnRichard Henderson2021-09-221-1/+1
* include/exec: Move cpu_signal_handler declarationRichard Henderson2021-09-221-7/+0Star
* target/microblaze: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé2021-09-143-12/+5Star
* accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson2021-07-211-18/+0Star
* Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into...Peter Maydell2021-07-121-11/+1Star
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| * target/microblaze: Use translator_use_goto_tbRichard Henderson2021-07-091-10/+1Star
| * tcg: Avoid including 'trace-tcg.h' in target translate.cPhilippe Mathieu-Daudé2021-07-091-1/+0Star
* | meson: Introduce target-specific KconfigPhilippe Mathieu-Daudé2021-07-091-0/+2
|/
* hw/core: Constify TCGCPUOpsRichard Henderson2021-05-271-1/+1
* cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOpsPhilippe Mathieu-Daudé2021-05-271-1/+1
* cpu: Introduce SysemuCPUOps structurePhilippe Mathieu-Daudé2021-05-271-0/+8
* cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClassClaudio Fontana2021-02-051-7/+18
* cpu: move do_unaligned_access to tcg_opsClaudio Fontana2021-02-051-1/+1
* cpu: move cc->transaction_failed to tcg_opsClaudio Fontana2021-02-051-1/+1
* cpu: move cc->do_interrupt to tcg_opsClaudio Fontana2021-02-051-1/+1
* cpu: Move tlb_fill to tcg_opsEduardo Habkost2021-02-051-1/+1
* cpu: Move cpu_exec_* to tcg_opsEduardo Habkost2021-02-051-1/+1
* cpu: Move synchronize_from_tb() to tcg_opsEduardo Habkost2021-02-051-1/+1
* cpu: Introduce TCGCpuOperations structEduardo Habkost2021-02-051-1/+1
* target/microblaze: Add security attributes on memory transactionsJoe Komlodi2021-01-273-5/+26
* target/microblaze: use MMUAccessType instead of int in mmu_translateJoe Komlodi2021-01-272-2/+2
* target/microblaze: Add use-non-secure propertyJoe Komlodi2021-01-272-0/+57
* tcg: Make tb arg to synchronize_from_tb constRichard Henderson2021-01-071-1/+2
* migration: Replace migration's JSON writer by the general oneMarkus Armbruster2020-12-191-1/+1
* target/microblaze: Fix possible array out of bounds in mmu_write()AlexChen2020-11-171-1/+2
* microblaze tcg cpus: Fix Lesser GPL version numberChetan Pant2020-11-158-8/+8
* qom: Remove module_obj_name parameter from OBJECT_DECLARE* macrosEduardo Habkost2020-09-181-1/+1
* Use OBJECT_DECLARE_TYPE where possibleEduardo Habkost2020-09-091-4/+2Star
* Use DECLARE_*CHECKER* macrosEduardo Habkost2020-09-091-6/+2Star
* Move QOM typedefs and add missing includesEduardo Habkost2020-09-091-3/+5
* target/microblaze: Put MicroBlazeCPUConfig into DisasContextRichard Henderson2020-09-071-12/+12
* target/microblaze: Fill in VMStateDescription for cpuRichard Henderson2020-09-074-8/+115
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-11-21 13:33:06 +0100