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authorMateja Marjanovic2019-04-02 15:43:25 +0200
committerAleksandar Markovic2019-05-26 17:33:16 +0200
commitc1c9a10fb1f7a6782711817c167a2c20b000fc12 (patch)
tree82c85e2cc7c0a3f994843a6cd040d15753957e30 /target/mips/translate.c
parenttarget/mips: Refactor and fix COPY_U.<B|H|W> instructions (diff)
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target/mips: Refactor and fix INSERT.<B|H|W|D> instructions
The old version of the helper for the INSERT.<B|H|W|D> MSA instructions has been replaced with four helpers that don't use switch, and change the endianness of the given index, when executed on a big endian host. Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1554212605-16457-6-git-send-email-mateja.marjanovic@rt-rk.com>
Diffstat (limited to 'target/mips/translate.c')
-rw-r--r--target/mips/translate.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 68ea6eefe9..dd706ad0b1 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -28346,7 +28346,24 @@ static void gen_msa_elm_df(CPUMIPSState *env, DisasContext *ctx, uint32_t df,
}
break;
case OPC_INSERT_df:
- gen_helper_msa_insert_df(cpu_env, tdf, twd, tws, tn);
+ switch (df) {
+ case DF_BYTE:
+ gen_helper_msa_insert_b(cpu_env, twd, tws, tn);
+ break;
+ case DF_HALF:
+ gen_helper_msa_insert_h(cpu_env, twd, tws, tn);
+ break;
+ case DF_WORD:
+ gen_helper_msa_insert_w(cpu_env, twd, tws, tn);
+ break;
+#if defined(TARGET_MIPS64)
+ case DF_DOUBLE:
+ gen_helper_msa_insert_d(cpu_env, twd, tws, tn);
+ break;
+#endif
+ default:
+ assert(0);
+ }
break;
}
break;