summaryrefslogtreecommitdiffstats
path: root/target/mips/translate.h
diff options
context:
space:
mode:
authorPhilippe Mathieu-Daudé2021-02-17 21:21:17 +0100
committerPhilippe Mathieu-Daudé2021-03-13 23:43:00 +0100
commitfe35ea94838d8faba749ecfd49256f59e5fe0653 (patch)
treeceb10980e6c894e34cdc635b36f671d959017635 /target/mips/translate.h
parenttarget/mips: Simplify decode_opc_mxu() ifdef'ry (diff)
downloadqemu-fe35ea94838d8faba749ecfd49256f59e5fe0653.tar.gz
qemu-fe35ea94838d8faba749ecfd49256f59e5fe0653.tar.xz
qemu-fe35ea94838d8faba749ecfd49256f59e5fe0653.zip
target/mips: Introduce mxu_translate_init() helper
Extract the MXU register initialization code from mips_tcg_init() as a new mxu_translate_init() helper. Make it public and replace !TARGET_MIPS64 ifdef'ry by the 'TARGET_LONG_BITS == 32' check to elide this code at preprocessing time. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210226093111.3865906-13-f4bug@amsat.org>
Diffstat (limited to 'target/mips/translate.h')
-rw-r--r--target/mips/translate.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/mips/translate.h b/target/mips/translate.h
index a5c49f1ee2..a807b3d256 100644
--- a/target/mips/translate.h
+++ b/target/mips/translate.h
@@ -179,6 +179,7 @@ extern TCGv bcond;
void msa_translate_init(void);
/* MXU */
+void mxu_translate_init(void);
bool decode_ase_mxu(DisasContext *ctx, uint32_t insn);
/* decodetree generated */