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authorWeiwei Li2022-03-25 09:59:01 +0100
committerAlistair Francis2022-04-22 02:35:16 +0200
commitc341e886d9d63a1a27e1b523991e36e2d8cefab7 (patch)
tree8a3bfb38568babf81c27b25b5bbed22a10911004 /target/riscv/helper.h
parenttarget/riscv: Add initial support for the Sdtrig extension (diff)
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target/riscv: optimize condition assign for scale < 0
for some cases, scale is always equal or less than 0, since lmul is not larger than 3 Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> Reviewed-by: Frank Chang <frank.chang@sifive.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220325085902.29500-1-liweiwei@iscas.ac.cn> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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