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author | Weiwei Li | 2022-03-25 09:59:01 +0100 |
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committer | Alistair Francis | 2022-04-22 02:35:16 +0200 |
commit | c341e886d9d63a1a27e1b523991e36e2d8cefab7 (patch) | |
tree | 8a3bfb38568babf81c27b25b5bbed22a10911004 /target/riscv/helper.h | |
parent | target/riscv: Add initial support for the Sdtrig extension (diff) | |
download | qemu-c341e886d9d63a1a27e1b523991e36e2d8cefab7.tar.gz qemu-c341e886d9d63a1a27e1b523991e36e2d8cefab7.tar.xz qemu-c341e886d9d63a1a27e1b523991e36e2d8cefab7.zip |
target/riscv: optimize condition assign for scale < 0
for some cases, scale is always equal or less than 0, since lmul is not larger than 3
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220325085902.29500-1-liweiwei@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/helper.h')
0 files changed, 0 insertions, 0 deletions