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authorRichard Henderson2019-03-21 03:21:31 +0100
committerRichard Henderson2019-05-06 20:18:34 +0200
commit451e4ffdb0003ab5ed0d98bd37b385c076aba183 (patch)
treea44e43ec7a72ee85d3c1d4b29fb09024311c87bf /target/riscv/insn_trans
parentdecodetree: Expand a decode_load function (diff)
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decodetree: Add DisasContext argument to !function expanders
This does require adjusting all existing users. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/riscv/insn_trans')
-rw-r--r--target/riscv/insn_trans/trans_rvc.inc.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/target/riscv/insn_trans/trans_rvc.inc.c b/target/riscv/insn_trans/trans_rvc.inc.c
index ebcd977b2f..3e5d6fd5ea 100644
--- a/target/riscv/insn_trans/trans_rvc.inc.c
+++ b/target/riscv/insn_trans/trans_rvc.inc.c
@@ -48,13 +48,13 @@ static bool trans_c_flw_ld(DisasContext *ctx, arg_c_flw_ld *a)
REQUIRE_EXT(ctx, RVF);
arg_c_lw tmp;
- decode_insn16_extract_cl_w(&tmp, ctx->opcode);
+ decode_insn16_extract_cl_w(ctx, &tmp, ctx->opcode);
arg_flw arg = { .rd = tmp.rd, .rs1 = tmp.rs1, .imm = tmp.uimm };
return trans_flw(ctx, &arg);
#else
/* C.LD ( RV64C/RV128C-only ) */
arg_c_fld tmp;
- decode_insn16_extract_cl_d(&tmp, ctx->opcode);
+ decode_insn16_extract_cl_d(ctx, &tmp, ctx->opcode);
arg_ld arg = { .rd = tmp.rd, .rs1 = tmp.rs1, .imm = tmp.uimm };
return trans_ld(ctx, &arg);
#endif
@@ -80,13 +80,13 @@ static bool trans_c_fsw_sd(DisasContext *ctx, arg_c_fsw_sd *a)
REQUIRE_EXT(ctx, RVF);
arg_c_sw tmp;
- decode_insn16_extract_cs_w(&tmp, ctx->opcode);
+ decode_insn16_extract_cs_w(ctx, &tmp, ctx->opcode);
arg_fsw arg = { .rs1 = tmp.rs1, .rs2 = tmp.rs2, .imm = tmp.uimm };
return trans_fsw(ctx, &arg);
#else
/* C.SD ( RV64C/RV128C-only ) */
arg_c_fsd tmp;
- decode_insn16_extract_cs_d(&tmp, ctx->opcode);
+ decode_insn16_extract_cs_d(ctx, &tmp, ctx->opcode);
arg_sd arg = { .rs1 = tmp.rs1, .rs2 = tmp.rs2, .imm = tmp.uimm };
return trans_sd(ctx, &arg);
#endif
@@ -107,7 +107,7 @@ static bool trans_c_jal_addiw(DisasContext *ctx, arg_c_jal_addiw *a)
#ifdef TARGET_RISCV32
/* C.JAL */
arg_c_j tmp;
- decode_insn16_extract_cj(&tmp, ctx->opcode);
+ decode_insn16_extract_cj(ctx, &tmp, ctx->opcode);
arg_jal arg = { .rd = 1, .imm = tmp.imm };
return trans_jal(ctx, &arg);
#else