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authorWeiwei Li2022-04-23 04:35:03 +0200
committerAlistair Francis2022-04-29 02:47:45 +0200
commit9e33e1753bc3a7c7cab9a293b242036344c43a02 (patch)
tree5b78743e75f0b7ef55cb84650f3efd9f455931fa /target/riscv/insn_trans
parenttarget/riscv: rvk: add support for zknd/zkne extension in RV32 (diff)
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target/riscv: rvk: add support for zkne/zknd extension in RV64
- add aes64dsm, aes64ds, aes64im, aes64es, aes64esm, aes64ks2, aes64ks1i instructions Co-authored-by: Ruibo Lu <luruibo2000@163.com> Co-authored-by: Zewen Ye <lustrew@foxmail.com> Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220423023510.30794-8-liweiwei@iscas.ac.cn> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/insn_trans')
-rw-r--r--target/riscv/insn_trans/trans_rvk.c.inc54
1 files changed, 54 insertions, 0 deletions
diff --git a/target/riscv/insn_trans/trans_rvk.c.inc b/target/riscv/insn_trans/trans_rvk.c.inc
index 8d0b42106f..6336b48cb5 100644
--- a/target/riscv/insn_trans/trans_rvk.c.inc
+++ b/target/riscv/insn_trans/trans_rvk.c.inc
@@ -69,3 +69,57 @@ static bool trans_aes32dsi(DisasContext *ctx, arg_aes32dsi *a)
REQUIRE_ZKND(ctx);
return gen_aes32_sm4(ctx, a, gen_helper_aes32dsi);
}
+
+static bool trans_aes64es(DisasContext *ctx, arg_aes64es *a)
+{
+ REQUIRE_64BIT(ctx);
+ REQUIRE_ZKNE(ctx);
+ return gen_arith(ctx, a, EXT_NONE, gen_helper_aes64es, NULL);
+}
+
+static bool trans_aes64esm(DisasContext *ctx, arg_aes64esm *a)
+{
+ REQUIRE_64BIT(ctx);
+ REQUIRE_ZKNE(ctx);
+ return gen_arith(ctx, a, EXT_NONE, gen_helper_aes64esm, NULL);
+}
+
+static bool trans_aes64ds(DisasContext *ctx, arg_aes64ds *a)
+{
+ REQUIRE_64BIT(ctx);
+ REQUIRE_ZKND(ctx);
+ return gen_arith(ctx, a, EXT_NONE, gen_helper_aes64ds, NULL);
+}
+
+static bool trans_aes64dsm(DisasContext *ctx, arg_aes64dsm *a)
+{
+ REQUIRE_64BIT(ctx);
+ REQUIRE_ZKND(ctx);
+ return gen_arith(ctx, a, EXT_NONE, gen_helper_aes64dsm, NULL);
+}
+
+static bool trans_aes64ks2(DisasContext *ctx, arg_aes64ks2 *a)
+{
+ REQUIRE_64BIT(ctx);
+ REQUIRE_EITHER_EXT(ctx, zknd, zkne);
+ return gen_arith(ctx, a, EXT_NONE, gen_helper_aes64ks2, NULL);
+}
+
+static bool trans_aes64ks1i(DisasContext *ctx, arg_aes64ks1i *a)
+{
+ REQUIRE_64BIT(ctx);
+ REQUIRE_EITHER_EXT(ctx, zknd, zkne);
+
+ if (a->imm > 0xA) {
+ return false;
+ }
+
+ return gen_arith_imm_tl(ctx, a, EXT_NONE, gen_helper_aes64ks1i, NULL);
+}
+
+static bool trans_aes64im(DisasContext *ctx, arg_aes64im *a)
+{
+ REQUIRE_64BIT(ctx);
+ REQUIRE_ZKND(ctx);
+ return gen_unary(ctx, a, EXT_NONE, gen_helper_aes64im);
+}