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authorRichard Henderson2021-02-28 00:21:17 +0100
committerRichard Henderson2021-05-27 00:33:59 +0200
commit119065574d02deffc28fe5b6a864db9b467c6ffd (patch)
treec39e28d90f8c3744c6ec816109df6c1b7a3000f8 /target/riscv
parenttarget/mips: Fold jazz behaviour into mips_cpu_do_transaction_failed (diff)
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hw/core: Constify TCGCPUOps
We no longer have any runtime modifications to this struct, so declare them all const. Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20210227232519.222663-3-richard.henderson@linaro.org>
Diffstat (limited to 'target/riscv')
-rw-r--r--target/riscv/cpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 9775d8ca5c..1f1cef1d6a 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -609,7 +609,7 @@ static const struct SysemuCPUOps riscv_sysemu_ops = {
#include "hw/core/tcg-cpu-ops.h"
-static struct TCGCPUOps riscv_tcg_ops = {
+static const struct TCGCPUOps riscv_tcg_ops = {
.initialize = riscv_translate_init,
.synchronize_from_tb = riscv_cpu_synchronize_from_tb,
.cpu_exec_interrupt = riscv_cpu_exec_interrupt,