diff options
| author | Mao Zhongyi | 2018-11-26 04:20:38 +0100 |
|---|---|---|
| committer | Palmer Dabbelt | 2018-12-20 22:15:10 +0100 |
| commit | 41fbbba7753457331d971887a74d9a96066f65ba (patch) | |
| tree | ab6c84a90123e7048211b3f8a1940d41e21c0bbb /target/riscv | |
| parent | target/riscv/pmp.c: Fix pmp_decode_napot() (diff) | |
| download | qemu-41fbbba7753457331d971887a74d9a96066f65ba.tar.gz qemu-41fbbba7753457331d971887a74d9a96066f65ba.tar.xz qemu-41fbbba7753457331d971887a74d9a96066f65ba.zip | |
riscv/cpu: use device_class_set_parent_realize
Signed-off-by: Mao Zhongyi <maozhongyi@cmss.chinamobile.com>
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'target/riscv')
| -rw-r--r-- | target/riscv/cpu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index a025a0a3ba..5e8a2cb2ba 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -330,8 +330,8 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) CPUClass *cc = CPU_CLASS(c); DeviceClass *dc = DEVICE_CLASS(c); - mcc->parent_realize = dc->realize; - dc->realize = riscv_cpu_realize; + device_class_set_parent_realize(dc, riscv_cpu_realize, + &mcc->parent_realize); mcc->parent_reset = cc->reset; cc->reset = riscv_cpu_reset; |