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authorDayeol Lee2018-10-26 20:04:27 +0200
committerPalmer Dabbelt2018-10-30 19:04:28 +0100
commit4a9b31b82bcd2cafe85137334f1c07afe56cc224 (patch)
tree36ec3dd8fb1e8bcacfa3f8024c5a215fb92582ea /target/riscv
parentMerge remote-tracking branch 'remotes/vivier2/tags/qemu-trivial-for-3.1-pull-... (diff)
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target/riscv/pmp.c: pmpcfg_csr_read returns bogus value on RV64
pmp_read_cfg() returns 8-bit value, which is combined together to form a single pmpcfg CSR. The default promotion rules will result in an integer here ("i*8" is integer, which flows through) resulting in a 32-bit signed value on most hosts. That's bogus on RV64I, with the high bits of the CSR being wrong. Signed-off-by: Dayeol Lee <dayeol@berkeley.edu> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'target/riscv')
-rw-r--r--target/riscv/pmp.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index f432f3b759..03abd8fe5e 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -325,7 +325,7 @@ target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t reg_index)
{
int i;
target_ulong cfg_val = 0;
- uint8_t val = 0;
+ target_ulong val = 0;
for (i = 0; i < sizeof(target_ulong); i++) {
val = pmp_read_cfg(env, (reg_index * sizeof(target_ulong)) + i);