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author | Richard Henderson | 2019-03-22 23:32:23 +0100 |
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committer | Richard Henderson | 2019-06-10 16:03:34 +0200 |
commit | 4f7c64b3819d559417615ed2b1d028ebc1a49580 (patch) | |
tree | 73711ac46b7eea9b9fc5fea93c2ea43cb20f9bdf /target/riscv | |
parent | tcg: Create struct CPUTLB (diff) | |
download | qemu-4f7c64b3819d559417615ed2b1d028ebc1a49580.tar.gz qemu-4f7c64b3819d559417615ed2b1d028ebc1a49580.tar.xz qemu-4f7c64b3819d559417615ed2b1d028ebc1a49580.zip |
cpu: Define CPUArchState with typedef
For all targets, do this just before including exec/cpu-all.h.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/riscv')
-rw-r--r-- | target/riscv/cpu.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index bc517dbad8..509aae0613 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -27,8 +27,6 @@ #define TCG_GUEST_DEFAULT_MO 0 -#define CPUArchState struct CPURISCVState - #define TYPE_RISCV_CPU "riscv-cpu" #define RISCV_CPU_TYPE_SUFFIX "-" TYPE_RISCV_CPU @@ -336,6 +334,8 @@ void riscv_set_csr_ops(int csrno, riscv_csr_operations *ops); void riscv_cpu_register_gdb_regs_for_features(CPUState *cs); +typedef CPURISCVState CPUArchState; + #include "exec/cpu-all.h" #endif /* RISCV_CPU_H */ |