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| author | Richard Henderson | 2019-03-23 01:16:06 +0100 |
|---|---|---|
| committer | Richard Henderson | 2019-06-10 16:03:42 +0200 |
| commit | 5b146dc716cfd247f99556c04e6e46fbd67565a0 (patch) | |
| tree | 7332e8ee9008dd30c402b3167f809677a1f50b4d /target/riscv | |
| parent | cpu: Introduce cpu_set_cpustate_pointers (diff) | |
| download | qemu-5b146dc716cfd247f99556c04e6e46fbd67565a0.tar.gz qemu-5b146dc716cfd247f99556c04e6e46fbd67565a0.tar.xz qemu-5b146dc716cfd247f99556c04e6e46fbd67565a0.zip | |
cpu: Introduce CPUNegativeOffsetState
Nothing in there so far, but all of the plumbing done
within the target ArchCPU state.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/riscv')
| -rw-r--r-- | target/riscv/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index d9611eaced..0ed7031915 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -210,6 +210,7 @@ typedef struct RISCVCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ + CPUNegativeOffsetState neg; CPURISCVState env; /* Configuration Settings */ |