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authorAlistair Francis2019-03-16 02:21:39 +0100
committerPalmer Dabbelt2019-03-19 13:14:40 +0100
commit6b745d4fada5c73db44f596a62e29a5dbe3fc53f (patch)
tree4394510e105ec332896c75cb67092a7a19c8390a /target/riscv
parentriscv: sifive_u: Allow up to 4 CPUs to be created (diff)
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target/riscv: Remove unused struct
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'target/riscv')
-rw-r--r--target/riscv/cpu.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index feea169e12..d61bce6d55 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -80,12 +80,6 @@ const char * const riscv_intr_names[] = {
"reserved"
};
-typedef struct RISCVCPUInfo {
- const int bit_widths;
- const char *name;
- void (*initfn)(Object *obj);
-} RISCVCPUInfo;
-
static void set_misa(CPURISCVState *env, target_ulong misa)
{
env->misa_mask = env->misa = misa;