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author | Richard Henderson | 2019-03-23 19:35:53 +0100 |
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committer | Richard Henderson | 2019-06-10 16:03:42 +0200 |
commit | e8b5fae5161c48e0d0e8b35eaf9dd8f35d692088 (patch) | |
tree | d702a7e40b012cee22a1c3cda7ef3bc85c26081b /target/riscv | |
parent | cpu: Move the softmmu tlb to CPUNegativeOffsetState (diff) | |
download | qemu-e8b5fae5161c48e0d0e8b35eaf9dd8f35d692088.tar.gz qemu-e8b5fae5161c48e0d0e8b35eaf9dd8f35d692088.tar.xz qemu-e8b5fae5161c48e0d0e8b35eaf9dd8f35d692088.zip |
cpu: Remove CPU_COMMON
This macro is now always empty, so remove it. This leaves the
entire contents of CPUArchState under the control of the guest
architecture.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/riscv')
-rw-r--r-- | target/riscv/cpu.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 0ed7031915..a935b17dbd 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -171,9 +171,6 @@ struct CPURISCVState { float_status fp_status; - /* QEMU */ - CPU_COMMON - /* Fields from here on are preserved across CPU reset. */ QEMUTimer *timer; /* Internal timer */ }; |