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| author | Aurelien Jarno | 2017-07-02 18:26:43 +0200 |
|---|---|---|
| committer | Aurelien Jarno | 2017-07-18 23:39:15 +0200 |
| commit | 82e8251374568ba63343b695925c883a7da3db6f (patch) | |
| tree | a1a11033ab6e3dce2c1bf153dcea468e3871fdae /target/sh4/translate.c | |
| parent | target/sh4: fix FPSCR cause vs flag inversion (diff) | |
| download | qemu-82e8251374568ba63343b695925c883a7da3db6f.tar.gz qemu-82e8251374568ba63343b695925c883a7da3db6f.tar.xz qemu-82e8251374568ba63343b695925c883a7da3db6f.zip | |
target/sh4: do not use a helper to implement fneg
There is no need to use a helper to flip one bit, just use a TCG xor
instruction instead.
Message-Id: <20170702202814.27793-5-aurelien@aurel32.net>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target/sh4/translate.c')
| -rw-r--r-- | target/sh4/translate.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/target/sh4/translate.c b/target/sh4/translate.c index bff212a78e..9360522a98 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -1691,9 +1691,8 @@ static void _decode_opc(DisasContext * ctx) return; case 0xf04d: /* fneg FRn/DRn - FPSCR: Nothing */ CHECK_FPU_ENABLED - { - gen_helper_fneg_T(cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B11_8)]); - } + tcg_gen_xori_i32(cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B11_8)], + 0x80000000); return; case 0xf05d: /* fabs FRn/DRn - FPCSR: Nothing */ CHECK_FPU_ENABLED |