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authorMax Filippov2018-01-11 20:13:01 +0100
committerMax Filippov2018-01-22 20:54:58 +0100
commit251634f4ce589d17eb0a14e36c65090713eb9e56 (patch)
tree48af8f7673af5a0aa9b59feb80aff7bcb9de50c7 /target/xtensa/translate.c
parenttarget/xtensa: allow different default CPU for MMU/noMMU (diff)
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target/xtensa: add sample_controller core
The sample_controller core is a simple noMMU general purpose core, modern analog of de212. It is used as a default core in the xtensa port of Zephyr. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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