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author | Max Filippov | 2017-02-07 11:43:12 +0100 |
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committer | Max Filippov | 2017-12-19 06:26:18 +0100 |
commit | 2eb967c4e9898d688a75be43955bbbc2107f29f7 (patch) | |
tree | 2deeebe8cde81a88b84e8583cb50316c5ee95723 /target/xtensa/translate.c | |
parent | Update version for v2.11.0 release (diff) | |
download | qemu-2eb967c4e9898d688a75be43955bbbc2107f29f7.tar.gz qemu-2eb967c4e9898d688a75be43955bbbc2107f29f7.tar.xz qemu-2eb967c4e9898d688a75be43955bbbc2107f29f7.zip |
target/xtensa: pass actual frame size to the entry helper
Currently 'entry' opcode helper accepts frame size divided by 8, as it
is encoded in the opcode. Make it more natural and accept actual frame
size instead.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target/xtensa/translate.c')
-rw-r--r-- | target/xtensa/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 20f7ddf042..225e4a5fe8 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -2830,7 +2830,7 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) { TCGv_i32 pc = tcg_const_i32(dc->pc); TCGv_i32 s = tcg_const_i32(BRI12_S); - TCGv_i32 imm = tcg_const_i32(BRI12_IMM12); + TCGv_i32 imm = tcg_const_i32(BRI12_IMM12 << 3); gen_helper_entry(cpu_env, pc, s, imm); tcg_temp_free(imm); tcg_temp_free(s); |